Browsing by Author "Ruan, Jian"

Now showing 1 - 1 of 1

A fast two-stage sample-and-hold amplifier for pipelined ADC application
(2008)
Ruan, Jian
;
Lee, Chung Len
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This paper presents a differential input, two-stage structure sample-hold-amplifier (SHA) for which each stage can be designed and adjusted separately to have a large input dynamic range and fast operation speed. The clock feed through and charge injection is eliminated. The implemented SHA with a 0.18um 1.8V process shows that it can sample a 2.5 MHz signal at 40 MHz with a 63d8 SFDR and a -62 dB THD which is able to realize an ADC of 10 bit resolution.