Browsing by Author "Shieh, Ming-Shan"

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Effect of chemical mechanical polish process on low-temperature poly-SiGe thin-film transistors
(2006)
Shieh, Ming-Shan
;
Chen, Chih-Yang
;
Hsu, Yuan-Jiun
;
Wang, Shen-De
;
Lei, Tan-Fu
The improvement of polycrystalline silicon germanium thin-film transistors (poly-SiGe TFTs) using NH(3) passivation and chemical mechanical polishing (CMP) process was examined. Experimental results indicated that NH(3) passivation could effectively improve the turn on characteristics. Moreover, the TFTs fabricated on polished poly-SiGe film exhibit: higher carrier mobility, better subthreshold swing, lower threshold voltage, and higher on/off current ratio due to the smooth poly-SiGe interface.
Plasma-induced damage on the performance and reliability of low-temperature polycrystalline silicon thin-film transistors
(2007)
Chen, Chih-Yang
;
Wang, Shen-De
;
Shieh, Ming-Shan
;
Chen, Wei-Cheng
;
Lin, Hsiao-Yi
We have investigated the impact of plasma-induced damage on the performance and reliability of low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The LTPS TFTs having different antenna structures were used to study the effects of the plasma-etching process. We observed that performance instability occurred for the devices having a relatively large-area antenna. Plasma damage mainly caused nonuniform distribution of the threshold voltages in the LTPS TFTs, presumably because of charge trapping in the gate dielectric during the plasma-etching process. The reliabilities of the LTPS TFTs having larger antenna areas were found to be more degraded under gate-bias stress and hot-carrier stress than those of the samples having smaller antenna areas. Because of their enhanced plasma damage, we speculate that the LTPS TFTs having larger antenna areas possess more trap states in the gate dielectrics. During gate-bias stress or hot-carrier stress, therefore, charges can be injected into the gate dielectric through trap-assisted tunneling, resulting in significant degradation of both the performance and reliability. (c) 2006 The Electrochemical Society.
Process induced instability and reliability issues in low temperature poly-Si thin film transistors
(2006)
Chen, Chih-Yang
;
Wang, Shen-De
;
Shieh, Ming-Shan
;
Chen, Wei-Cheng
;
Lin, Hsiao-Yi
We investigated the impact of plasma process on the devices' performance and reliability degradation of low temperature poly-Si thin film transistors (LTPS TFTs). LTPS TFTs with different antenna areas were used to study the effects of the plasma etching process on the devices. The larger TFT antenna area, the more performance instability occurs. The reliability of LTPS TFTs with large antenna areas was found to be degraded from gate bias stress and hot carrier stress.