Browsing by Author "Shih, CH"
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Item type:Item, An aided congestion avoidance mechanism for TCP Vegas(2005-01-01) ;Ho, CY ;Shih, CH ;Chen, YC ;Chan, YC資訊工程學系TCP Vegas detects network congestion in the early stage and successfully prevents periodic packet loss that usually occurs in TCP Reno. It has been demonstrated that TCP Vegas achieves much higher performance than TCP Reno in many aspects. However, TCP Vegas cannot prevent unnecessary throughput degradation when congestion occurs in the backward path, it passes through multiple congested links, or it reroutes through a path with longer round-trip time (RTT). In this paper, we propose an aided congestion avoidance mechanism for TCP Vegas, called Aid-Vegas, which uses the relative one-way delay of each packet along the forward path to distinguish whether congestion occurs or not. Through the results of simulation, we demonstrate that Aid-Vegas can solve the problems of rerouting and backward congestion, enhance the fairness among the competitive connections, and improve the throughput when multiple congested links are encountered.Item type:Item, An aided congestion avoidance mechanism for TCP Vegas(2005-01-01) ;Ho, CY ;Shih, CH ;Chen, YC ;Chan, YC交大名義發表TCP Vegas detects network congestion in the early stage and successfully prevents periodic packet loss that usually occurs in TCP Reno. It has been demonstrated that TCP Vegas achieves much higher performance than TCP Reno in many aspects. However, TCP Vegas cannot prevent unnecessary throughput degradation when congestion occurs in the backward path, it passes through multiple congested links, or it reroutes through a path with longer round-trip time (RTT). In this paper, we propose an aided congestion avoidance mechanism for TCP Vegas, called Aid-Vegas, which uses the relative one-way delay of each packet along the forward path to distinguish whether congestion occurs or not. Through the results of simulation, we demonstrate that Aid-Vegas can solve the problems of rerouting and backward congestion, enhance the fairness among the competitive connections, and improve the throughput when multiple congested links are encountered.Item type:Item, Enhancing Bluetooth performance in interference environments via channel-state-dependent packet scheduling with adaptive packet selection(2004) ;Shih, CH ;Wang, KC ;Liu, AY ;資訊工程學系Department of Computer ScienceIn this paper, we propose a Bluetooth channel state dependent data segmentation and reassembly (CSD-SAR) scheme and a queue state dependent priority (QSD-PR) scheduling policy. The CSD-SAR maintains a receiving frequency table to predict channel conditions and selects the best packet type and packet size to transmit data. In addition, the QSD-PR also uses the receiving frequency table to avoid bad frequencies and gives a selected master-slave pair, which has more queued data to send between each other and has a higher priority to eliminate the wastage of slots. The conventional scheduling policy, Round Robin (RR), yields poor performance with the time division duplex (TDD) based MAC protocol and results in slot wastage and may not ensure fairness. Simulation results show that our proposed scheme achieves better link utilization and higher throughput with bounded delay compared to the RR scheme in error-free and error-prone environments. Our scheme can also eliminate interference to other wireless networks that share the same spectrum, such as WLANs, by avoiding selecting channels occupied by other networks.Item type:Item, Formal compliance verification of interface protocols(2005) ;Yang, YC ;Huang, JD ;Yen, CC ;Shih, CHJou, JYVerifying whether a building block conforms to certain interface protocol is one of the important steps while constructing an SoC However, most existing methods have their own limitations. Simulation-based methods have the false positive problem while formal property checking methods may suffer from memory explosion and excessive runtime. In this paper, we propose a novel branch-and-bound algorithm for interface protocol compliance verification. The properties of the interface protocol are specified as a specification FSM, and the interface logic is formally verified at the higher FSM level. Using the FSM for property specification is relatively systematic than using other proprietary property languages, which greatly reduces the possibility of incomplete property identification. And it is shown theoretically and experimentally that the proposed algorithm can finish in reasonable time complexity.Item type:Item, On compliance test of on-chip bus for SOC(2004) ;Lin, HM ;Yen, CC ;Shih, CH ;Jou, JY電子工程學系及電子研究所In this paper, we employ a monitor-based approach for on-chip bus (OCB) compliance test. To describe the OCB protocols, we propose a FSM model, which can help to extract the necessary properties systematically and verify the data part of a bus transfer efficiently. To demonstrate our methodology, we illustrate two OCB protocols, WISHBONE and AMBA AHB, as the study cases. The experimental results show that we can verify the OCB protocols efficiently and detect the design errors when tests fail.Item type:Item, Stimulus generation for interface protocol verification using the non-deterministic extended finite state machine model(2005) ;Shih, CH ;Huang, JD ;Jou, JY ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsVerifying if air integrated component is compliant with certain interface protocol is a big issue in component-based SOC designs. Massive constrained random simulation stimuli are becoming crucial to achieve a high verification quality. To further improve the quality, the stimulus biasing technique should be used to guide the simulation to hit design corners. In this paper we model the interface protocol with the non-deterministic extended finite state machine (NEFSM), and then propose an automatic stimulus generation approach based oil the NEFSM. This approach is capable of providing numerous biasing options. Experiment results demonstrate the high controllability scheme.Item type:Item, Structure-stability-activity relationship in covalently cross-linked N-carbamoyl D-amino acid amidohydrolase and N-acylamino acid racemase(2006-06-09) ;Chiu, WC ;You, JY ;Liu, JS ;Hsu, SKHsu, WHN-Acylamino acid racemase (NAAAR) and N-carbamoyl-D-amino-acid amidohydrolase (D-NCAase) are important biocatalysts for producing enantiopure a-amino acids. NAAAR forms an octameric assembly and displays induced fit movements upon substrate binding, while D-NCAase is a tetramer that does not change conformation in the presence of a ligand. To investigate the effects of introducing potentially stabilizing S-S bridges in these different multimeric enzymes, cysteine residues predicted to form inter or intra-subunit disulfide bonds were introduced by site-directed mutagenesis. Inter-subunit S-S bonds were formed in two NAAAR variants (A68C-D72C and P60C-Y100C) and two D-NCAase variants (A302C and P295C-F304C). Intra-subunit S-S bonds were formed in two additional NAAAR variants (E149C-A182C and V265C). Crystal structures of NAAARs variants show limited deviations from the wild-type overall tertiary structure. An apo A68C-D72C subunit differs from the wild-type enzyme, in which it has an ordered lid loop, resembling ligand-bound NAAAR. The structures of A222C and A302C D-NCAases are nearly identical to the wild-type enzyme. All mutants with inter-subunit bridges had increases in thermostability. Compared with the wild-type enzyme, A68C-D72C NAAAR showed similar k(cat)/K-m ratios, whereas mutant D-NCAases demonstrated increased k(cat)/K-m ratios at high temperatures (A302C: 4.2-fold at 65 degrees C). Furthermore, molecular dynamic simulations reveal that A302C substantially sustains the fine-tuned catalytic site as temperature increases, achieving enhanced activity. (c) 2006 Elsevier Ltd. All rights reserved.Item type:Item, Superpolishing for planarizing copper damascene interconnects(2003-05-01) ;Chang, SC ;Shieh, JM ;Dai, BT ;Feng, MSLi, YHWe demonstrate a superpolishing electrolyte, which consists of acid additives in conventional Cu polishing electrolytes (H3PO4), for efficiently planarizing Cu damascene features. The significant additive concentration gradient in features, resulting in a selective Cu dissolution rate within features, is explored as a major mechanism that yields such electrolytes with high planarization efficiency. Moreover, another additive, polyethylene glycol as a suppressor, is also employed to reduce oxygen bubbling on polished films. Consequently, a smooth surface with a complete step height elimination is obtained in a 70 mm trench after electropolishing. (C) 2003 The Electrochemical Society.