Browsing by Author "Shih, Ching-Chieh"

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Analysis of Degradation Mechanism in SONOS-TFT Under Hot-Carrier Operation
(2010-12-01)
Chen, Te-Chih
;
Chang, Ting-Chang
;
Chen, Shih-Ching
;
Hsieh, Tien-Yu
;
Jian, Fu-Yen
This letter investigates the degradation mechanism of polycrystalline silicon thin-film transistors with a silicon-oxide-nitride-oxide-silicon structure under OFF-state stress. During the electrical stress, the hot hole generated from band-to-band tunneling process will inject into gate dielectric, and the significant ON-state degradation (more than 1 order) indicates that the interface states are accompanied with hot-hole injection. In addition, the asymmetric I-V characteristics indicate that the interface states are located near the drain side. Moreover, the ISE-TCAD simulation tool was utilized to model the degradation mechanism and analyze trap states distribution. Although both the vertical and lateral electrical fields are factors for degradation and hot-hole injection, the degradation is mainly affected by the lateral electrical field over a critical point.
Electrical Properties of Metal-Silicon Nitride-Hydrogenated Amorphous Silicon Capacitor Elucidated Using Admittance Spectroscopy
(2008-12-01)
Hsieh, Ming-Ta
;
Chen, Jenn-Fang
;
Yen, Kuo-Hsi
;
Zan, Hsiao-Wen
;
Chang, Chan-Ching
Detailed admittance spectroscopy was performed on a metal-silicon nitride-hydrogenated amorphous silicon (MIAS) structure. On the basis of the properties of hydrogenated amorphous silicon (a-Si:H), three simplified equivalent circuit models under various operating conditions (accumulation, depletion and full depletion) are presented along with an alternative direct measurement method at room temperature. Admittance spectroscopy shows that the interface states density between silicon nitride (SiN(x)) and a-Si:H can be determined from the depletion equivalent circuit model. The resisivity and activation energy of a-Si:H can also be obtained using the accumulation and depletion equivalent circuit models. These models can be employed easily to monitor the fabrication parameters of thin-films transistors (TFTs) and to accurately and directly obtain the capacitance model parameters of TFTs. [DOI: 10.1143/JJAP.47.8714]
Temperature coefficient of diode-connected LTPS poly-Si TFTs and its application on the bandgap reference circuit
(2008)
Lu, Ting-Chou
;
Zan, Hsiao-Wen
;
Ker, Ming-Dou
;
Huang, Wei-Ming
;
Lin, Kun-Chih
The temperature coefficient (TC) of n-type diode-connected polycrystalline silicon thin-film transistors (poly-Si TFTs) is investigated. The relationship between TC and the activation energy is observed and explained. It is also found that TC is not sensitive to the deviation of the laser crystallization energy. On the contrary, channel width can effectively modulate TC. By using the diode-connected poly-Si TFTs with different channel widths, a new bandgap reference circuit for precise analog circuit design on glass substrate is proposed and realized. From the experimental results in a LTPS process, the output voltage reference exhibits a very low TC of 195 ppm/degrees C, between 25 degrees C and 125 degrees C.
Unusual Threshold Voltage Shift Caused by Self-Heating-Induced Charge Trapping Effect
(2010)
Jian, Fu-Yen
;
Chang, Ting-Chang
;
Chu, An-Kuo
;
Chen, Te-Chih
;
Chen, Shih-Ching
This article investigates the threshold voltage (V(t)) shift induced by a self-heating effect for n-channel low temperature poly-Si thin film transistors (TFTs) and finds that there is a shift of more than 3 V in the negative direction after a self-heating operation of 100 ms. The negative V(t) shift can be attributed to the charge-trapping effect caused by the holes generated by trap-assisted band-to-band thermionic field emission and trapped in the grain boundary of the poly-Si film substrate. We used lateral body contact structure to verify that this unusual V(t) shift is related to the holes trapped in the substrate. (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3290686] All rights reserved.