Browsing by Author "Shih, Jou-Miao"

Now showing 1 - 6 of 6

Charge trapping induced frequency-dependence degradation in n-MOSFETs with high-k/metal gate stacks
(2011-12-30)
Dai, Chih-Hao
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Chang, Ting-Chang
;
Chu, Ann-Kuo
;
Kuo, Yuan-Jui
;
Hung, Ya-Chi
This letter investigates the reliability issues of HfO(2)/Ti(1-x)N(x) metal-oxide-semiconductor field effect transistor in terms of static and dynamic stress. The results indicate threshold voltage (V(th)) instability under dynamic stress is more serious than that under static stress, owning to transient charge trapping within high-k dielectric. Capacitance-voltage techniques verified that electron trapping under dynamic stress was located in high-k dielectric near the source/drain (S/D) overlap region, rather than the overall dielectric. Furthermore, the V(th) shift clearly increases with an increase in dynamic stress operation frequency. This phenomenon can be attributed to the fact that electrons injecting to the S/D overlap region have insufficient time to de-trap from high-k dielectric. We further investigated the impact of different Ti(1-x)N(x) composition of metal-gate electrode on charge trapping characteristics, and observed that V(th) shift decreases significantly with an increase in the ratio of nitride. This is because the nitride atoms diffusing from the metal gate fill up oxygen vacancies and reduce the concentration of traps in high-k dielectric. Crown Copyright (C) 2011 Published by Elsevier B.V. All rights reserved.
Hot carrier effect on gate-induced drain leakage current in high-k/metal gate n-channel metal-oxide-semiconductor field-effect transistors
(2011-07-04)
Dai, Chih-Hao
;
Chang, Ting-Chang
;
Chu, Ann-Kuo
;
Kuo, Yuan-Jui
;
Ho, Szu-Han
This paper investigates the channel hot carrier stress (CHCS) effects on gate-induced drain leakage (GIDL) current in high-k/metal-gate n-type metal-oxide-semiconductor field effect transistors. It was found that the behavior of GIDL current during CHCS is dependent upon the interfacial layer (IL) oxide thickness of high-k/metal-gate stacks. For a thinner IL, the GIDL current gradually decreases during CHCS, a result contrary to that found in a device with thicker IL. Based on the variation of GIDL current at different stress conditions, the trap-assisted band-to-band hole injection model is proposed to explain the different behavior of GIDL current for different IL thicknesses. (C) 2011 American Institute of Physics. [doi:10.1063/1.3608241]
Hot Carrier Effect on Gate-Induced Drain Leakage Current in n-MOSFETs with HfO2/Ti1-xNx Gate Stacks
(2012)
Dai, Chih-Hao
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Chang, Ting-Chang
;
Chu, Ann-Kuo
;
Kuo, Yuan-Jui
;
Ho, Szu-Han
"This paper investigates the effect of channel hot carrier stress (CHCS) on gate-induced drain leakage (GIDL) current in n-type metal-oxide-semiconductor field effect transistor (n-MOSFETs) with HfO2/Ti1-xNx gate stacks. It was found that the behavior of GIDL current during CHCS has dependence with the interfacial layer (IL) oxide thickness of high-k/metal gate stacks. As IL thickness becomes thinner, the GIDL current has a gradual decrease during CHCS, which is contrary to the result of thick-oxide IL devices. Based on the variation of GIDL current (Delta I-GIDL) in different stress voltage across gate and drain terminals, trap-assisted band to band holes injection model was proposed to explain the different behavior of GIDL current for different IL thickness. Furthermore, we also investigated the impact of different Ti1-xNx composition of metal gate electrode on the Delta I-GIDL after CHCS, and observed that the magnitude of Delta I-GIDL decreases with the increase of nitride ratio. This is due to the fact that nitride atoms diffusing from the metal gate fill up oxygen vacancies, and reduce the concentration of traps in high-k dielectric. (C) 2012 The Electrochemical Society. [DOI: 10.1149/2.001206esl] All rights reserved."
Impact of static and dynamic stress on threshold voltage instability in high-k/metal gate n-channel metal-oxide-semiconductor field-effect transistors
(2011-02-28)
Dai, Chih-Hao
;
Chang, Ting-Chang
;
Chu, Ann-Kuo
;
Kuo, Yuan-Jui
;
Lo, Wen-Hung
This letter investigates the impact of static and dynamic stress on threshold voltage (V(th)) instability in ultrathin n-channel metal-oxide-semiconductor field-effect transistors with hafnium-based gate stacks. Experimental results indicate V(th) shift under dynamic stress is more serious than that under static stress due to charge trapping within the high-k dielectric. Capacitance-voltage techniques demonstrated that electron trapping under dynamic stress was located in the high-k dielectric near the source/drain overlap region rather than throughout the overall dielectric layer. This implies in real circuit operation, the phenomenon of electrons trapped in high-k near the source/drain overlap is the main issue affecting V(th) instability. (C) 2011 American Institute of Physics. [doi:10.1063/1.3560463]
NBTI Degradation in LTPS TFTs Under Mechanical Tensile Strain
(2011-07-01)
Lin, Chia-Sheng
;
Chen, Ying-Chung
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Chang, Ting-Chang
;
Jian, Fu-Yen
;
Hsu, Wei-Che
This letter investigates the negative-bias temperature instability (NBTI) degradation of p-channel low-temperature polycrystalline-silicon thin-film transistors (LTPS TFTs) under mechanical tensile stress. Experimental results reveal that the interface state density N(it) and grain boundary trap density N(trap) of tensile-strained LTPS TFTs are more pronounced than those of unstrained LTPS TFTs. Extracted density of states and conduction activation energy E(a) both show increases due to the strained Si-Si bonds, which implies that strained Si-Si bonds are able to react with dissociated H during NBTI stress. Therefore, NBTI degradation is more significant after tensile strain than in an unstrained condition.
On the Origin of Gate-Induced Floating-Body Effect in PD SOI p-MOSFETs
(2011-07-01)
Dai, Chih-Hao
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Chang, Ting-Chang
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Chu, An-Kuo
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Kuo, Yuan-Jui
;
Jian, Fu-Yen
This letter systematically investigates the origin of gate-induced floating-body effect (GIFBE) in partially depleted silicon-on-insulator p-type MOSFETs. The experimental results indicate that GIFBE causes a reduction in the electrical oxide field, leading to an underestimate of negative-bias temperature instability degradation. This can be partially attributed to the electrons tunneling from the process-induced partial n(+) polygate. However, based on different operation conditions, we found that the dominant origin of electrons was strongly dependent on holes in the inversion layer under source/drain grounding. This suggests that the mechanism of GIFBE at higher voltages is dominated by the proposed anode electron injection model, rather than the electron valence band tunneling widely accepted as the mechanism for n-MOSFETs.