Browsing by Author "Shih, Pi-Chia"

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On-chip transient detection circuit for system-level ESD protection in CMOS ICs
(2006)
Ker, Ming-Dou
;
Yen, Cheng-Cheng
;
Shih, Pi-Chia
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed in this paper. The circuit performance to detect different positive and negative fast electrical transients has been investigated by HSPICE simulator and verified in silicon chip. The experimental results in a 0.13-mu m CMOS process have confirmed that the proposed on-chip transient detection circuit can detect fast electrical transients during system-level ESD zapping. The proposed transient detection circuit can be further cooperated with power-on reset circuit to improve the immunity of CMOS IC products against system-level ESD stress.
On-chip transient detection circuit for system-level ESD protection in CMOS integrated circuits to meet electromagnetic compatibility regulation
(2008-02-01)
Ker, Ming-Dou
;
Yen, Cheng-Cheng
;
Shih, Pi-Chia
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed. The circuit performance to detect different positive and negative fast electrical transients has been investigated by the HSPICE simulator and verified in a silicon chip. The experimental results in a 0.13-mu m CMOS integrated circuit (IC) have confirmed that the proposed on-chip transient detection circuit can be used to detect fast electrical transients during the system-level ESD events. The proposed transient detection circuit can be further combined with the power-on reset circuit to improve the immunity of the CMOS IC products against system-level ESD stress.
System-level ESD protection design with on-chip transient detection circuit
(2006)
Yen, Cheng-Cheng
;
Ker, Ming-Dou
;
Shih, Pi-Chia
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A new on-chip transient detection circuit for system-level electrostatic (d) under bar ischarge (ESD) protection is proposed. By including this new proposed on-chip transient detection circuit, a hardware/firmware solution cooperated with power-on reset circuit has been analyzed to fix the system-level ESD issues. The circuit performance to detect different positive and negative fast electrical transients has been investigated by HSPICE simulator and verified in silicon chip. The experimental results in a 0.13-mu m CMOS process have confirmed that the proposed on-chip transient detection circuit can detect fast electrical transients during system-level ESD zapping.