Browsing by Author "Shih, Yi-Shing"

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A 1.2 V 114 mW Dual-Band Direct-Conversion DVB-H Tuner in 0.13 mu m CMOS
(2009-03-01)
Kuo, Ming-Ching
;
Kao, Shiau-Wen
;
Chen, Chih-Hung
;
Hung, Tsun-Shuen
;
Shih, Yi-Shing
A fully integrated direct-conversion tuner is implemented in 0.13 mu m CMOS technology. A broadband noise-canceling balun LNA with the proposed dual cross-coupling technique helps achieve an overall receiver noise figure from 3.7 to 4.3 dB while consuming only 3.6 mW. The proposed current-mode switching scheme improves the achievable SNIR with a gain step of 15 dB, providing IIP3 improvement of 18 dB and NF degradation of only 6 dB. Moreover, design trade-offs are carefully considered in designing the baseband circuit, which provides wide gain tuning and bandwidth accuracy with a DC offset residual less than 6 mV. The measured maximum SNR values are better than 30 dB over wide input power levels, ensuring robust reception in a mobile environment. All circuit blocks are operated at 1.2 V. As a result, the tuner consumes power as low as 114 mW in the continuous mode. This compact tuner supports both UHF and L-bands, and occupies only 7.2 mm(2) die area.
A novel design of high-speed divide-by-3/4 counter for a dual-modulus prescaler
(2006-06-25)
Shih, Yi-Shing
;
Tarng, Jenn-Hwan
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電信工程研究所
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Institute of Communications Engineering
A novel design for a high-speed divide-by-3/4 counter is presented. The proposed design reduces not only the critical path delay but also the feedback path delay, hence it can increase the operating speed. With this divide-by-3/4 counter, a divide-by-127/128 dual-modulus prescaler (DMP), implemented in 0.18 mu m CMOS technology, shows a maximum operating frequency of 7.0 GHz with 2.4mW power consumption at 1.8V supply voltage, which has 25% speed improvement and still consumes less power as well compared to the recently-reported one.