Browsing by Author "Shih Wei-Yeh"
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Item type:Item, REAL-TIME MULTI-CHANNEL AUTOMATIC EYE BLINK ARTIFACT ELIMINATOR(2015-01-15) ;Fang Wai-Chi ;Liao Jui-Chieh ;Shih Wei-Yeh ;Huang Kuan-JuChen Chiu-KuoA real-time multi-channel automatic eye blink artifact eliminator includes a receiving unit for receiving independent component data; a temporary storage unit for saving pieces of the independent component data to form a data segment; a detection unit for detecting an eye blink artifact in the data segment through a sample entropy algorithm to generate a sample entropy value corresponding to the data segment; and a processing unit for determining whether the data segment contains the eye blink artifact according to the sample entropy value to generate an output result, eliminating the eye blink artifact according to the output result and outputting processed independent component data. The receiving unit continuously receives a next piece of the independent component data and the temporary storage unit discards the oldest one and adds a new one to form a new data segment, thereby continuously performing the eye blink artifact elimination to each data segment.Item type:Item, REAL-TIME SIGNAL PROCESSING SYSTEM AND METHOD BASED ON MULTI-CHANNEL INDEPENDENT COMPONENT ANALYSIS(2014-10-23) ;Fang Wai-Chi ;Shih Wei-Yeh ;Liao Jui-Chien ;Huang Kuan-JuChen Chiu-KuoA real-time signal processing system and method based on multi-channel independent component analysis (ICA). A one-pass recursive ICA processor uses a computation module to perform multi-channel ICA on a set of first data to generate a plurality of second data and third data. A noise removing module uses the computation module to identify noise in the second data and remove the identified noise to generate a plurality of fourth data. A reconstruction module uses the computation module to reconstruct the set of first data based on the fourth data and the third data to generate a plurality of fifth data. The one-pass recursive ICA processor, the noise removing module, the reconstruction module and the computation module are all implemented on a single chip, such that the one-pass recursive ICA processor, the noise removing module and the reconstruction module share the same computation module to save hardware resources.