Browsing by Author "Stathis, James H."
Now showing 1 - 2 of 2
- Results Per Page
- Sort Options
Item type:Item, Impact of NBTI and PBTI in SRAM Bit-cells: Relative Sensitivities and Guidelines for Application-Specific Target Stability/Performance(2009) ;Bansal, Aditya ;Rao, Rahul ;Kim, Jae-Joon ;Zafar, SufiStathis, James H.The stability and performance characteristics of Static Random Access Memories (SRAMs) are known to degrade with time due to the impact of Negative and Positive Bias Temperature Instabilities (NBTI (in PFET) and PBTI (in NFET)). In this work, we provide insights into relative sensitivities of these phenomena on speed and stability of SRAM cells. Relative impact on access time, stability, and tolerability of one phenomenon over another has been studied for different application specific (high-performance or low-power) SRAM cells. We show that high-performance SRAM cells should have lower V-T drift due to PBTI compared with dense cells to contain READ stability and access time. Further, worst-case static stress poses tighter process constraints compared with alternating stress.Item type:Item, Impacts of NBTI and PBTI on SRAM static/dynamic noise margins and cell failure probability(2009-06-01) ;Bansal, Aditya ;Rao, Rahul ;Kim, Jae-Joon ;Zafar, SufiStathis, James H.Negative and Positive Bias Temperature Instabilities (NBTI (in PFET) and PBTI (in NFET)) weaken MOSFETs with time. The impact of such device degradation can be severe in Static Random Access Memories (SRAMs) wherein stability is governed by relative strengths of FETs. Degradation in stability with time under 'worst case condition' gets more important because of reduced guard-banding due to process induced instability. In this work, circuit insights into worst-case conditions and effect of NBTI and PBTI, individually and in combination, on the stability of an SRAM cell are presented. It is shown that measurable quantities such as static noise-margin are not sufficient to completely understand the combined effect of NBTI and PBTI Monte-Carlo simulations are performed in a 45 nm PDSOI technology to estimate the increase in cell failure probability with time. In worst case, NBTI and PBTI both degrade read stability (significantly) and writability, (marginally). Further, we analyze the choice of optimal power supply considering the trade-off between short-term stability (due to process variations) and long-term stability (due to NBTI/PBTI) to achieve six-sigma confidence in SRAM cell robustness. (C) 2009 Elsevier Ltd. All rights reserved.