Browsing by Author "Su, Chau-Chin"

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A Micro-Network on Chip with 10-Gb/s Transmission Link
(2009)
Liu, Wei-Chang
;
Lin, Chih-Hsien
;
Jou, Shyh-Jye
;
Lu, Hung-Wen
;
Su, Chau-Chin
In this paper, a micro-network on chip (MNoC) with 10-Gb/s transmission link is proposed. A prototype system with two 5-port packet-based on-chip micro-switches and a 10-Gb/s data transceiver with an all digital data recovery circuit and a self-calibration clock generator are designed. This chip is implemented in 0.13 mu m CMOS technology. The core area of this chip is 990 mu m*1600 mu m and the power consumption is 155mW (60mW for micro-switches and 95mW for 10-Gb/s data transceiver) at 1.2V supply voltage with 10-Gb/s transmission data rate.
A self-calibrate all-digital 3Gbps SATA driver design
(2005)
Wang, Hsin-Wen
;
Lu, Hung-Wen
;
Su, Chau-Chin
;
電控工程研究所
;
Institute of Electrical and Control Engineering
This paper presents an all digital Low Voltage Differential Signal (LVDS) driver for Serial-ATA (SATA-II) with simultaneous switching noise (SSN) reduction capability. An auto calibration mechanism is included to deal with the process and environmental variation. The chip is implemented using TSMC 0.18-mu m 1P6M CMOS technology. The core area is 350050 mu m(2). The transmitter operates at 3 Gbps under a 1.8V power supply and consumes 11 mW of power.