Browsing by Author "Su, Pin-Han"

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The Design of Low-Power CIFF Structure Second-Order Sigma-Delta Modulator
(2009)
Su, Pin-Han
;
Chiueh, Herming
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This paper presents the design and implementation of a low power sigma-delta modulator (SDM) with a standard 0.18-mu m CMOS technology. A current optimization technique is utilized in proposed design to reduce the power of operational trans-conductance amplifier(OTA). Using a chain of Integrators with weighted feed-forward summation (CIFF) structure and optimized single-stage class-A OTA with positive feedback to minimize the power consumption, the second-order SDM achieves a SNR of 64dB that be able to process the signal form DC to 16 KHz. The power consumption is only 18.1 uW from a 1-V supply.