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Browsing by Author "Su, Pio"

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    Suppressed Fin-LER Induced Variability in Negative Capacitance FinFETs
    (2017-01-01)
    Lee, Ho-Pei
    ;
    Su, Pio
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    This work investigates the impact of fin-LER on the subthreshold characteristics of the negative-capacitance FinFETs by TCAD atomistic simulation coupled with the Landau-Khalatnikov equation. Our study indicates that the variability for V-T, SS and DIBL can be suppressed by the negative-capacitance feedback mechanism. The ferroelectric layer exhibits larger gate voltage amplification for the device with more severe short channel effect and vice versa, and explains the superior immunity to LER variation for the negative capacitance FinFETs.