Browsing by Author "Tai, Ming-Chi"

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Monolithic 3D BEOL FinFET switch arrays using location-controlled-grain technique in voltage regulator with better FOM than 2D regulators
(2019-01-01)
Hsieh, Ping-Yi
;
Chang, Yi-Jui
;
Chen, Pin-Jun
;
Chen, Chun-Liang
;
Yang, Chih-Chao
Monolithic 3D back-end of line (BEOL) FinFET switch arrays are demonstrated in large single crystalline Si islands (2.56 mu m(2)), whose location, size and shape are determined by design. Details of the improved location-controlled-grain (LCG) technique are presented. A voltage regulator implemented with the BEOL switch arrays using external control signals shows better theoretical figure of merit (FOM) of 0.089ns than 2D voltage regulators of 0.43ns.
Transient Thermal Damage Simulation for Novel Location-Controlled Grain Technique in Monolithic 3D IC
(2019-01-01)
Chen, Pin-Jun
;
Shen, Chih-Ming
;
Yang, Chih-Chao
;
Tai, Ming-Chi
;
Lo, Wei-Chung
In this research, Finite Element Method (FEM) is used to simulate transient thermal conduction in the monolithic three-dimensional integrated circuit (3DIC) with a novel location-controlled-grain (LCG) technique. Through this method, the impact of laser flux, amorphous Si thickness and interlayer dielectric (ILD) thickness on that model can be investigated. Furthermore, with the assistance of thermal damage simulation, we can utilize the optimal process parameters in this state-of-the-art technique to accelerate the development of advanced semiconductor technologies.