Browsing by Author "Tai, Wei-Cheng"

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A 242mW, 10mm(2) 1080p H.264/AVC high profile encoder chip
(2008)
Lin, Yu-Kun
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Li, De-Wei
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Lin, Chia-Chun
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Kuo, Tzu-Yun
;
Wu, Sian-Jin
A 1080p high profile H.264 encoder is designed by the robust reusable silicon IP methodology and fabricated in a 0.13 mu m CMOS technology with an area of 10 mm(2) and 242mW at 145MHz. Compared to the state-of-the-art design targeted at 720p baseline, this design reduces 53.4% power and 46.7% area through parallelism enhanced throughput and cross stage sharing pipeline.
Bandwidth-Rate-Distortion Optimized Motion Estimation
(2009)
Tai, Wei-Cheng
;
Li, Gwo-Long
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Chang, Tian-Sheuan
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電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Motion estimation process is the most computational and memory intensive component in video encoders. However, traditional motion estimation algorithms focus on rate and distortion performance and do not take memory bandwidth into consideration. As a result, its performance will be degraded under bandwidth constraint environment. In this paper, a bandwidth-rate-distortion optimized motion estimation algorithm is introduced to solve the above issue. Simulation results show that the proposed method could achieve similar performance as the bandwidth unconstrained method with up to 70% bandwidth saving.
Memory bandwidth-scalable motion estimation for mobile video coding
(2011)
Hsieh, Jui-Hung
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Tai, Wei-Cheng
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Chang, Tian-Sheuan
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The heavy memory access of motion estimation (ME) execution consumes significant power and could limit ME execution when the available memory bandwidth (BW) is reduced because of access congestion or changes in the dynamics of the power environment of modern mobile devices. In order to adapt to the changing BW while maintaining the rate-distortion (R-D) performance, this article proposes a novel data BW-scalable algorithm for ME with mobile multimedia chips. The available BW is modeled in a R-D sense and allocated to fit the dynamic contents. The simulation result shows 70% BW savings while keeping equivalent R-D performance compared with H.264 reference software for low-motion CIF-sized video. For high-motion sequences, the result shows our algorithm can better use the available BW to save an average bit rate of up to 13% with up to 0.1-dB PSNR increase for similar BW usage.