Browsing by Author "Tan, TJ"

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Socillator test: A delay test scheme for embedded ICs in the boundary-scan environment
(2001)
Tan, TJ
;
Lee, CL
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A novel test scheme, which uses an oscillation source to supply the test signal and a transition detector to detect the arrival of the transition of the test signal through the CUT within the specific delay rime, is proposed. The scheme is ideal to test embedded chips in the boundary scan environment within an SOC.