Browsing by Author "Tang, CJ"

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A novel transient characterization technique to investigate trap properties in HfSiON gate dielectric MOSFETs - From single electron emission to PBTI recovery transient
(2006-05-01)
Wang, TH
;
Chan, CT
;
Tang, CJ
;
Tsai, CW
;
Wang, HCH
A positive bias temperature instability (PBTI) recovery transient technique is presented to investigate trap properties in HfSiON as high-k gate dielectric in nMOSFETs. Both large and small-area nMOSFETs are characterized. In a large-area device, the post-PBTI drain current exhibits a recovery transient and follows logarithmic time dependence. In a small-area device, individual trapped electron emission from HfSiON gate dielectric, which is manifested by a staircase-like drain current evolution with time, is observed during recovery. By measuring the temperature and gate voltage dependence of trapped electron emission times, the physical mechanism for PBTI recovery is developed. An analytical model based on thermally assisted tunneling can successfully reproduce measured transient characteristics. In addition, HfSiON trap properties, such as trap density and activation energy, are characterized by this method.
Comparison of oxide breakdown progression in ultra-thin oxide SOI and bulk pMOSFETs
(2004)
Chan, CT
;
Kuo, CH
;
Tang, CJ
;
Chen, MC
;
Wang, TH
Accelerated oxide breakdown progression in ultra-thin oxide (1.4nm) SOI pMOSFETs is observed, as compared to bulk devices. The accelerated progression is explained by the increase of hole stress current as a result of breakdown induced channel carrier heating in a floating-body configuration. Numerical simulation of hole tunneling current and hot carrier luminescence measurement are carried out to justify the proposed theory.
Investigation of post-NBTI stress recovery in pMOSFETs by direct measurement of single oxide charge de-trapping
(2005)
Chan, CT
;
Ma, HC
;
Tang, CJ
;
Wang, TH
;
電子工程學系及電子研究所
A novel method to study post-NBTI stress recovery in pMOSFETs is demonstrated by direct measurement of single-hole de-trapping behavior. Individual trapped hole emission in NBTI recovery is observed for the first time, which is manifested by the step-like evolution of channel current. By measuring trapped hole emission times and corresponding current jump, the dependence of NBTI recovery on stress hardness, recovery gate voltage and temperature, and gate length is characterized. An analytical model based on thermally-assisted tunneling of trapped oxide charges can successfully reproduce measured recovery characteristics.
Positive bias and temperature stress induced two-stage drain current degradation in HfSiON nMOSFET's
(2005)
Chan, CT
;
Tang, CJ
;
Wang, T
;
Wang, HCH
;
Tang, DD
Positive bias and temperature (PBTI) stress induced drain current degradation in HfSiON gate dielectric nMOSFETs is investigated by using a transient measurement technique. The degradation exhibits two stages, featuring different degradation rate and stress temperature dependence. The drain current degradation in the first stage is attributed to the charging of pre-existing high-k dielectric traps while the degradation in the second stage is mainly due to additional high-k trap creation. Process effect on high-k trap growth is evaluated.
Single-electron emission of traps in HfSiON as high-k gate dielectric for MOSFETs
(2005)
Chan, CT
;
Tang, CJ
;
Kuo, CH
;
Ma, HC
;
Tsai, CW
A novel method for characterizing MOSFETs with HfSiON high-k gate dielectric is demonstrated for the first time by direct measurement of single-electron de-trapping. Individual high-k trapped electron emission is recorded, which is manifested by the step-like evolution of channel current. The physical path of electron de-trapping can be identified from the emission time of such single-electron de-trapping. The dependence of charge emission time on gate voltage and temperature is measured. An analytical model based on thermally assisted tunneling can predict the emission time behavior, trap activation energy, trap density, and total available traps in high-k gate dielectric.