Browsing by Author "Taylor, Stewart S."
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Item type:Item, A 5-GHz, 30-dBm, 0.9-dB insertion loss single-pole double-throw T/R switch in 90nm CMOS(2008) ;Fu, Chang-Tsung ;Taylor, Stewart S. ;Ku, Chien-Nan ;交大名義發表National Chiao Tung UniversityA 5GHz, 30-dBm CMOS T/R switch implemented in 90nm CMOS is reported. A body isolation technique is employed and optimized for power handling capability. Inductors are employed with the transistor switches for parallel resonance to improve isolation. Thick oxide NMOS transistors are used for the switching transistors and placed inside the inductors to reduce the active chip area to approximately 0.2mm(2). 0.9-dB insertion loss for both TX and RX modes is achieved with a 5-V control voltage.Item type:Item, A Fully Integrated Ultra-Low Insertion Loss T/R Switch for 802.11b/g/n Application in 90 nm CMOS Process(2009-05-01) ;Kidwai, Adil A. ;Fu, Chang-Tsung ;Jensen, Jonathan C. ;Taylor, Stewart S.交大名義發表A 30 dBm ultra-low insertion loss CMOS transmit-receive switch fully integrated with an 802.11b/g/n transceiver front-end is demonstrated. The switch achieves an insertion loss of 0.4 dB in transmit mode and 0.1 dB in receive mode. The entire receiver chain from antenna to baseband output achieves a measured noise figure of 3.6 dB at 2.4 GHz. The switch has a P(1dB) greater than 30 dBm by employing a substrate isolation technique without using deep n-well technology. The switch employs a 1.2 V supply and occupies 0.02 mm(2) of die area.Item type:Item, Low-Noise Amplifier Design With Dual Reactive Feedback for Broadband Simultaneous Noise and Impedance Matching(2010-04-01) ;Fu, Chang-Tsung ;Kuo, Chien-Nan ;Taylor, Stewart S. ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsThe simultaneous noise and impedance matching (SNIM) condition for a common-source amplifier is analyzed. Transistor noise parameters are derived based on the more complete hybrid-pi model, and the dominant factors jeopardizing SNIM are identified. Strategies for narrowband and broadband SNIM (BSNIM) are derived accordingly. A dual reactive feedback circuit along with an LC-ladder matching network is proposed to achieve the BSNIM. It includes a capacitive and an inductive feedback, where the former utilizes the transistor parasitic gate-to-drain capacitance and the latter is formed by transformer coupling. This circuit topology has been validated in 0.18- and 0.13-mu m CMOS technologies for a 3-11-GHz ultra-wideband (UWB) and a 2.4-5.4-GHz multistandard application, respectively. The 3-11-GHz UWB low-noise amplifier is detailed as a design example.