Browsing by Author "Tillack, B."

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260-GHz differential amplifier in SiGe heterojunction bipolar transistor technology
(2017-02-02)
Yoon, D.
;
Seo, M. -G.
;
Song, K.
;
Kaynak, M.
;
Tillack, B.
A 260-GHz amplifier in a SiGe heterojunction bipolar transistor (HBT) technology is reported. It is based on three-stage differential cascode topology and adopts a passive shunt transistor pair at the output of each amplifying stage to relax instability caused by parasitic base inductance of amplifying transistor pair. The instability of the amplifier can be mitigated by tuning the base bias voltage of the shunt transistor pair. Peak gain of the amplifier was measured as 15 dB at 260 GHz. DC power dissipation is 112 mW. The chip occupies 300 x 160 m(2) excluding Baluns and probing pads.
Effect of graded-temperature arsenic prelayer on quality of GaAs on Ge/Si substrates by metalorganic vapor phase epitaxy
(2011-10-24)
Yu, H. W.
;
Chang, E. Y.
;
Yamamoto, Y.
;
Tillack, B.
;
Wang, W. C.
The growth of GaAs epitaxy on Ge/Si substrates with an arsenic prelayer grown with graded temperature ramped from 300 to 420 degrees C is investigated. It is demonstrated that the graded-temperature arsenic prelayer grown on a Ge/Si substrate annealed at 650 degrees C not only improves the surface morphology (roughness: 1.1 nm) but also reduces the anti-phase domains' (APDs) density in GaAs epitaxy (dislocation density: similar to 2 x 10(7) cm(-2)). Moreover, the unwanted interdiffusion between Ge and GaAs epitaxy is suppressed by using the graded-temperature arsenic prelayer due to the low energy of the Ge-As bond and the use of a low V/III ratio of 20. (C) 2011 American Institute of Physics. [doi:10.1063/1.3656737]