Browsing by Author "Tsai, Bo-An"

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Low-Temperature Microwave Annealing for MOSFETs With High-k/Metal Gate Stacks
(2013-10-01)
Lee, Yao-Jen
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Tsai, Bo-An
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Lai, Chiung-Hui
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Chen, Zheng-Yao
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Hsueh, Fu-Kuo
In this letter, low-temperature (480 degrees C) microwave annealing (MWA) for MOS devices with high-k/metal gate-stacks is demonstrated. The capacitance-voltage (C-V) characteristics of the MOS gate-stacks, TiN/HfO2, and TaN/HfO2, after different annealing methods are discussed. The increases in equivalent oxide thickness (EOT) of the MOS devices after dopant activation processing can be eliminated using low temperature MWA. In addition, the short channel effects in nMOSFETs annealed by MWA can be also improved because of the suppression of dopant diffusion and stabilization of EOT.
Low-Temperature Microwave Annealing Process for Dopant Activation and Thermal Stability of TiN Material
(2012)
Tsai, Bo-An
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Lai, Chiung-Hui
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Lee, Bo-Shiun
;
Luo, Chih-Wei
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Lee, Yao-Jen
"In this study, using microwave annealing for dopant activation and thermal stability of the TiN gate electrode is investigated. Workfunction shift of TiN materials was suppressed due to the low temperature process. Implanted species, such as phosphorus, arsenic, and boron, can also be well-activated and diffusionless in Si after microwave annealing. Moreover, analysis of X-ray diffraction intensity can be used to explain the workfunction shift of the TiN materials. (C) 2012 The Electrochemical Society. [DOI: 10.1149/2.013206esl] All rights reserved."
Low-temperature Microwave Annealing Processes for Future IC Fabrication
(2014)
Lee, Yao-Len
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Tsai, Bo-An
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Cho, Ta-Chun
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Hsueh, Fu-Kuo
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Sung, Po-Jung
Low temperature microwave annealing (MWA) for IC processing is promising. In this study, using microwave annealing for dopant activation and thermal stability of the high-k/metal gate is investigated. Implanted species, such as phosphorus, arsenic, and boron, can also be well-activated and diffusionless in Si after microwave annealing. The flat band voltage shift of metal gate was suppressed due to the low temperature process. The increases in equivalent oxide thickness (EOT) of the MOS devices after dopant activation processing can be eliminated by using low temperature MW A. In addition, the short channel effects in n & pMOSFETs annealed by MW A can be also improved due to the suppression of dopant diffusion and stabilization of EOT.
Using spike-anneal to reduce interfacial layer thickness and leakage current in metal-oxide-semiconductor devices with TaN/Atomic layer deposition-grown HfAlO/chemical oxide/Si structure
(2008-04-01)
Tsai, Bo-An
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Lee, Yao-Jen
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Peng, Hsin-Yi
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Tzeng, Pei-Jer
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Luo, Chih-wei
In this study, the characteristics of Ta/chemical SiO(2)/Si devices with their chemical oxides formed by various chemicals, including HNO(3), SCl, and H(2)SO(4)+H(2)O(2) solutions, were first investigated. We found the HNO(3) split depicts the lowest leakage current and the best hysteresis behavior. Next, chemical oxide formed by HNO(3) was applied to form the interfacial SiO(2) layer for metal-oxide-semiconductor (MOS) devices with Ta/HfAlO/chemical SiO(2)/Si structrue. The effects of a high-temperature spike anneal were then studied. We found that the spike-anneal process can effectively reduce the thickness of the chemical oxide from 10 to 7 angstrom, thus is beneficial in preserving the low effective oxide thickness (EOT) of the structure. Furthermore, both the gate leakage current and stress-induced leakage current (SILC) were also effectively suppressed by the high-temperature spike-anneal.