Browsing by Author "Tsai, Chia-Ku"

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Board-Level ESD of Driver ICs on LCD Panel
(2009-03-01)
Tseng, Jen-Chou
;
Hsu, Chung-Ti
;
Tsai, Chia-Ku
;
Chen, Shu-Chuan
;
Ker, Ming-Dou
In this paper, a method utilizing a charged-device model (CDM) test by the tape carrier package or chip-on-film (COF) samples to emulate the real-world board-level CDM or charged-board model (CBM) electrostatic discharge is proposed for large-sized chips such as liquid-crystal display (LCD) driver ICs, which successfully duplicated the same failure by CBM discharging. For small-sized chips, the evaluation board (or printed circuit board) emulation should minimize the parasitic RLC loading of the interconnection on the board to achieve a more accurate CBM discharging. In addition, guidelines regarding chip-level design and layout optimization are proposed and have been successfully implemented to improve the immunity.
Failure Analysis on Gate-Driven ESD Clamp Circuit after TLP Stresses of Different Voltage Steps in a 16-V CMOS Process
(2012)
Dai, Chia-Tsen
;
Chiu, Po-Yen
;
Ker, Ming-Dou
;
Tsai, Fu-Yi
;
Peng, Yan-Hua
The ESD robustness of gate-driven ESD clamp circuit in a 16-V CMOS process was investigated by the stresses of transmission line pulse (TLP), human-body-model ESD test, and machine-model (MM) ESD test. After TLP stresses of different voltage steps, the same ESD clamp circuit got different secondary breakdown currents (It2). In order to understand such unusual phenomenon, the failure analysis on the TLP-stressed ESD clamp circuits was performed to find the failure mechanism.