Browsing by Author "Tsai, JH"
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Item type:Item, A study of the threshold voltage variations for ultrathin body double gate SOI MOSFETs(2004) ;Tang, CS ;Lo, SC ;Lee, JW ;Tsai, JHLi, YMSilicon on insulator (SOI) devices have been of great interest in these years. In this paper, simulation with density-gradient transport model is performed to examine the variation of threshold voltage (VTH) for double gate SOI MOSFETs. Different thickness of silicon (Si) film, oxide thickness, channel length and doping concentration are considered in this work. According to the numerical study, both drift-difftision (DD) and density gradient (DG) models demonstrate that the thickness of Si film greatly affects the threshold voltage (5 similar to 15% variation). It is found that the thickness of Si film decreases, VTH variation increases; and the dependence relation is nonlinear. Therefore, this effect must be taken into account for the realization of double gate SOI ULSI circuit.Item type:Item, Antireflective coating for ITO films deposited on glass substrate(1999-09-01) ;Chiou, BS ;Tsai, JH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsThe refractive index n of radio-frequency (r.f.) magnetron sputtered indium tin oxide (ITO) films varies with sputtering parameters, such as sputtering power and oxygen percentage in the sputtering ambient. In this study, the feasibility to fabricate multilayer antireflective (AR) coating with a single ITO target by controlling the sputtering conditions is explored. Reduction in the reflectance can be achieved by using a one-quarter-wavelength inner layer ITO with a refractive index n = 1.87 and a one-quarter-wavelength outer layer ITO with n = 2.17. Hence, a single ITO target suffices in the preparation of multilayer AR coating. This simplifies the deposition processes and equipment for the fabrication of AR coating. Surface corrugation, another approach to the reduction of reflectance, is also discussed.Item type:Item, Two design patterns for data-parallel computation based on master-slave model(1999-05-28) ;Huang, KC ;Wang, FJ ;Tsai, JH ;資訊工程學系Department of Computer ScienceThis paper presents two design patterns useful for parallel computations of master-slave model. These patterns are concerned with task management and parallel and distributed data structures. They can be used to help addressing the issues of data partition and mapping, dynamic task allocation and management in parallel programming with the benefit of less programming efforts and better program structures. The patterns are described in object-oriented notation, accompanied with illustrative examples in C++. We also provide our experience in applying these patterns to two scientific simulation programs simulating Ising model and plasma physics respectively. Since master-slave model is a widely used parallel programming paradigm, the design patterns presented in this paper have large potential application in parallel computations. (C) 1999 Elsevier Science B.V. All rights reserved.