Browsing by Author "Tsai, JW"

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Reducing threshold voltage shifts in amorphous silicon thin film transistors by hydrogenating the gate nitride prior to amorphous silicon deposition
(1997-09-01)
Tsai, JW
;
Huang, CY
;
Tai, YH
;
Cheng, HC
;
Su, FC
A short H-2 plasma treatment of the gate SiNx before depositing amorphous silicon (a-Si:H) is found to significantly decrease the threshold shifts in the bias stress, inverted a-Si:H thin film transistors (TFTs). The reduced threshold voltage shift is attributed to a plasma induced reconstruction of SiNx precursors leading to the removal of the weak bonds. A prolonged plasma treatment, however, degraded the TFT characteristics; this was traced H-2 plasma damage which eventually generated a rough a-Si:H/SiNx interface. (C) 1997 American Institute of Physics.
Reducing threshold voltage shifts in amorphous silicon thin film transistors by hydrogenating the gate nitride prior to amorphous silicon deposition
(1997-09-01)
Tsai, JW
;
Huang, CY
;
Tai, YH
;
Cheng, HC
;
Su, FC
A short H-2 plasma treatment of the gate SiNx before depositing amorphous silicon (a-Si:H) is found to significantly decrease the threshold shifts in the bias stress, inverted a-Si:H thin film transistors (TFTs). The reduced threshold voltage shift is attributed to a plasma induced reconstruction of SiNx precursors leading to the removal of the weak bonds. A prolonged plasma treatment, however, degraded the TFT characteristics; this was traced H-2 plasma damage which eventually generated a rough a-Si:H/SiNx interface. (C) 1997 American Institute of Physics.
The electrical characteristics of the amorphous silicon thin film transistors with dual intrinsic layers
(1997-08-01)
Tsai, JW
;
Cheng, HC
;
Chou, A
;
Su, FC
;
Luo, FC
The amorphous silicon thin film transistors (a-Si:H TFTs) with dual intrinsic layers, namely, a bottom a-Si:H deposited at a low deposition rate and an upper layer at a high deposition rate, were investigated to improve the manufacturing throughput. It was found that the high deposition rate for the upper layer resulted in high density of states and low mobility and high threshold voltage. Although a-Si:H TFTs with high deposition rates for the upper layer still had an I-on/I-off ratios higher than 10(6) and saturation mobility higher than 0.4 cm(2)/V s, the deposition rates of 1786 and 3340 Angstrom/min exhibited a significant current crowding and led to low mobility and on-current in the linear region. On the other hand, a-Si:H TFTs with deposition rate of 1170 Angstrom/min for the upper layer achieved similar characteristics as those with single layer deposited at deposition rate of 482 Angstrom/min. Furthermore, the stress stability for deposition rate of 1170 Angstrom/min also showed a threshold voltage shift similar to that of a single-layer one. This indicated that the deposition rate of the upper layer for dual-layer a-Si:H TFTs must be properly chosen for applications in high resolution LCDs.
The instability characteristics of amorphous silicon thin film transistors with various interfacial and bulk defect states
(1997-10-01)
Cheng, HC
;
Tsai, JW
;
Huang, CY
;
Luo, FC
;
Tuan, HC
The instability characteristics of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) with various interfacial and bulk defect states were systematically investigated. It was found that, under positive bias stresses; the threshold voltage shifts of a-Si:H TFT's with the same interfacial defect states but with different bulk defect states exhibited similar threshold voltage shift characteristics. In contrast, a-Si:H TFTs with different interfacial defect states but the same bulk defect states showed threshold voltage shifts proportional to the interfacial defect states under positive bias stresses. Furthermore, both the above kinds of a-Si:H TFT under positive bias stresses exhibited that the subthreshold swing shift characteristics closely related to both the interfacial and bulk defect states.
The instability characteristics of amorphous silicon thin film transistors with various interfacial and bulk defect states
(1997-10-01)
Cheng, HC
;
Tsai, JW
;
Huang, CY
;
Luo, FC
;
Tuan, HC
The instability characteristics of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) with various interfacial and bulk defect states were systematically investigated. It was found that, under positive bias stresses; the threshold voltage shifts of a-Si:H TFT's with the same interfacial defect states but with different bulk defect states exhibited similar threshold voltage shift characteristics. In contrast, a-Si:H TFTs with different interfacial defect states but the same bulk defect states showed threshold voltage shifts proportional to the interfacial defect states under positive bias stresses. Furthermore, both the above kinds of a-Si:H TFT under positive bias stresses exhibited that the subthreshold swing shift characteristics closely related to both the interfacial and bulk defect states.
The instability mechanisms of hydrogenated amorphous silicon thin film transistors under AC bias stress
(2000-07-01)
Huang, CY
;
Teng, TH
;
Tsai, JW
;
Cheng, HC
;
電子工程學系及電子研究所
Hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with silicon nitride (SiNx) gates have been stressed under various AC biases to investigate the instability mechanisms. The state creation is dominant at low stress voltage although the charge trapping also occurs in SiNx gates, and such cases have also been found under the DC bias stress. In addition, the degradations of a-Si:H TFTs are found to be independent of the AC frequency for the positive polarity but show frequency dependence for the negative polarity due to the RC effect. Furthermore, the threshold voltage shift is associated with the duty ratio due to the accumulation of stress time. Finally, the degradation of the a-Si:H TFTs under bipolar AC bias stress is also introduced. It is found that the instability mechanisms of devices are composed of different charge compensations in SiNx and redistributions of defect states in the a-Si:H layer.
Turnaround phenomenon of threshold voltage shifts in amorphous silicon thin film transistors under negative bias stress
(2000-10-01)
Huang, CY
;
Tsai, JW
;
Teng, TH
;
Yang, CJ
;
Cheng, HC
The turnaround phenomenon of threshold voltage shifts is investigated in thin film transistors (TFTs) with different defect densities of hydrogenated amorphous silicon (a-Si:H) films and compositions of SiNx. It was found that TFTs with high-defect-density a-Si:H films and N-rich SiNx gate exhibit the turnaround phenomenon while TFTs with other conditions of a-Si:H and SiNx films do not. Results reveal that the turnaround phenomenon is greatly influenced by charge traps in SiNx and state creation in the a-Si:H layer. When state creation is dominant at low bias stress, the turnaround phenomenon occurs. In contrast, if charge trapping is dominant at low bias stress, the turnaround phenomenon does not occur.