Browsing by Author "Tsai, Ming-Li"
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Item type:Item, Enhancing the Thermal Stability of GaSb Schottky-Barrier MOSFET With Pt Source/Drain(2018-07-01) ;Tsai, Ming-Li ;Chang, Yun-Pin ;Chien, Chao-Hsin ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsIn this study, a Pt/GaSb Schottky diode with impressive rectifying behavior is used for the first time in the fabrication of a GaSb p-channel Schottkybarrier metal-oxide-semiconductor field-effect transistor (MOSFET). A gate-last integration scheme was employed to fabricate the MOSFET. Compared with a MOSFET with a Ni-alloy source and drain (S/D), the MOSFET with a Pt-alloy S/D can endure higher thermal stress during atomic layer deposition at 250 degrees C for 1 h without significant junction degradation. This high endurance to thermal stress is because Pt alloy has a lower reactivity to GaSb and a higher crystallization temperature. As a result, a record high ON/OFF ratio of 3 x 10(4) is reported for the GaSb Schottky-barrier MOSFET; an effective hole mobility of approximately 82 cm(2)V(-1)s(-1) is achieved.Item type:Item, Highly scaled equivalent oxide thickness of 0.66nm for TiN/HfO2/GaSb MOS capacitors by using plasma-enhanced atomic layer deposition(2017-08-01) ;Tsai, Ming-Li ;Wang, Shin-Yuan ;Chien, Chao-Hsin ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsThrough in situ hydrogen plasma treatment (HPT) and plasma-enhanced atomic-layer-deposited TiN (PEALD-TiN) layer capping, we successfully fabricated TiN/HfO2/GaSb metal-oxide-semiconductor capacitors with an ultrathin equivalent oxide thickness of 0.66nm and a low density of states of approximately 2 x 10(12)cm(-2) eV(-1) near the valence band edge. After in situ HPT, a native oxide-free surface was obtained through efficient etching. Moreover, the use of the in situ PEALD-TiN layer precluded high-. dielectric damage that would have been caused by conventional sputtering, thereby yielding a superior high-. dielectric and low gate leakage current. (C) 2017 The Japan Society of Applied PhysicsItem type:Item, Integration of Hetero-Structure Body-Tied Ge FinFET Using Retrograde-Well Implantation(2016) ;Chou, Yu-Che ;Hsu, Chung-Chun ;Chun, Cheng-Ting ;Chou, Chen-HanTsai, Ming-LiIn this work, we investigated the influence of retrograde-well implantation on hetero-structure body-tied germanium (Ge) FinFET [1]. Using structural engineering, the retrograde well was fabricated prior to Ge epitaxy, which could avoid the activated temperature of dopant in Si substrate. With optimizing the implant condition, the p-Ge/n-Si hetero-structure junction exhibited high I-ON/I-OFF ratio and lower junction leakage (4x10(-3)mu A/cm(2)). Furthermore, we also make a comparison of planar and mesa junction structures, mesa junction exhibited lower junction leakage (6x10(-6)mu A/cm(2))as compared with the planar one mentioned before, which could be attributed to improvement in peripheral leakage due to dislocation within Ge and Si. Comparing the difference between retrograde-well and implant-free Ge FinFETs, the drain induced barrier lowering (DIBL) was considerably improved by 50 %. Our retrograde-well Ge FinFET exhibited a high I-ON/I-OFF ratio similar to 8x10(3) (I-S) than the conventional Ge FinFET (I-ON/I-OFF similar to 2x10 (3)).Item type:Item, Integration of microwave-annealed oxidation on germanium metal-oxide-semiconductor devices(2018-09-01) ;Hsu, Chung-Chun ;Chi, Wei-Chun ;Tsai, Yi-He ;Tsai, Ming-LiWang, Shin-YuanIn this paper, a method that entails using microwave thermal oxidation to form a high-quality gate dielectric on Ge through surface passivation at considerably low temperatures (<400 degrees C) is presented. Formation of the GeOx layer was confirmed by x-ray photoelectron spectroscopy. To reduce the bulk trap density and interface trap density (D-it), microwave thermal oxidation was employed for post-deposition microwave thermal oxidation after the deposition of Al2O3 through atomic layer deposition. Tiny frequency dispersion in capacitance measurement and a low D-it value of 5.9 x 10(11) cm(-2) eV(-1) near the midgap confirmed a desirable passivation effect, which was favorable in mitigating the formation of dangling bonds on the Ge surface. A small hysteresis in capacitance was also observed, suggesting that the bulk dielectric was of high quality. On the basis of these characteristics, microwave-activated GeOx is a promising passivation layer material for aggressively scaled Ge-related metal oxide semiconductor devices. Published by the AVS.Item type:Item, Interface Characterization of HfO2/GaSb MOS Capacitors With Ultrathin Equivalent Oxide Thickness by Using Hydrogen Plasma Treatment(2016-09) ;Tsai, Ming-Li ;Ko, Jun-Yu ;Wang, Shin-Yuan ;Chien, Chao-Hsin電子工程學系及電子研究所We investigate p-type GaSb MOS capacitors with various HfO2 thicknesses grown using an atomic layer deposition. GaSb surfaces treated with ex-situ chemical solution and in situ remote hydrogen plasma are inspected. After a series of etching steps, the GaSb surfaces exhibit smooth topography, indicating that this combination of treatments is capable of realizing ultrathin dielectric deposition. After etching processes, the ultrathin (approximately 3 nm) HfO2 layer deposited successfully on GaSb exhibit high-permittivity (approximately 21) properties as well as equivalent oxide thickness (EOT) of 0.75 nm, which can be attributed to the flat surface. To the best of our knowledge, the EOT of GaSb capacitor prepared using the exploited approach is record low. Furthermore, we find that the interlayer present after hydrogen plasma treatment and forming gas annealing could efficiently passivate interface state density and achieve high C-V modulation. Compared with the benchmark of gate leakage current versus EOT, the electrical performance with low gate leakage current of the GaSb MOS capacitors demonstrates the high feasibility of the proposed treatments.Item type:Item, Study of High-Ge-Content Si0.16Ge0.84 Gate Stack by Low Pressure Oxidation(2018-01-01) ;Lee, Wei-Li ;Zhang, Jun-Lin ;Tsai, Ming-Li ;Wang, Shin-YuanLuo, Guang-LiIn this study, we employed low-pressure oxidation (LPO) to achieve a high-quality dielectric gate stack on high-Ge-content (HGC) Si0.16Ge0.84. According to X-ray photoelectron spectroscopy depth-profiling results, lowering the oxidation pressure can drive out-diffusion of Si atoms from the HGC SiGe surface, resulting in the suppression of GeOx formation. A nearly GeOx-free interfacial layer detected at an O-2 pressure of 0.01 torr at 600 degrees C was used. Consequently, the formation of stable SiOx resulted in the improvement of D-it and gate leakage current, which in accumulation (V-FB-1V) was also considerably reduced with an equivalent oxide thickness of 1.5 nm. Finally, by applying the LPO process and optimized process conditions, the interface trap density (D-it) was reduced to 2 x 10(12) eV(-1) cm(-2). (C) 2018 The Electrochemical Society.Item type:Item, Study of the Band Alignment between Atomic-Layer-Deposited High-kappa Dielectrics and MoS2 Film(2018-01-01) ;Chung, Yun-Yan ;Tsai, Ming-Li ;Ho, Yen-Teng ;Tseng, Yuan-ChiehChien, Chao-HsinIn this study, we determined the energy-band alignment of various amorphous high-kappa dielectrics (Al2O3, HfO2, ZrO2, and TiO2) that were deposited on amolybdenum disulfide (MoS2) film through atomic layer deposition by using high-resolutionX-ray photoelectron spectroscopy. The uniformity and continuity of the MoS2 films were inspected by physical characterizations. The roughness of MoS2 film deposited by chemical vapor deposition was evaluated using atomic force microscopy. Moreover, cross-sectional transmission electron microscopy images confirmed that all high-kappa dielectrics were uniformly and continuously deposited on the MoS2 film, leading to superior high-kappa dielectric-MoS2 stacks. An abrupt interface between the high-kappa dielectrics and MoS2 film was also observed. Finally, the valance and conduction band offsets between the Al2O3, HfO2, ZrO2, and TiO2 and the MoS2 film interface were measured to be 3.14, 1.81, 1.56, and 0.18 eV and 2.36, 1.77, 1.88, and 1.68 eV, respectively. Our study demonstrated the direct deposition of numerous commonly used high-kappa dielectrics on top of a MoS2 film. This top-down scheme is very useful for applying two-dimensional materials to complementary metal-oxide-semiconductor field-effect-transistor circuits. (C) 2018 The Electrochemical Society.