Browsing by Author "Tseng, Kuo-Feng"
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Item type:Item, Custom 6-R, 2-or 4-W Multi-Port Register Files in an ASIC SOC with a DVFS Window of 0.5 V, 130 MHz to 0.96 V, 3.2 GHz in a 28-nm HKMG CMOS Technology(2015) ;Hsieh, Henry ;Dhong, Sang H. ;Lin, Cheng-Chung ;Kuo, Ming-ZhangTseng, Kuo-FengWe describe custom 6R, 2/4W general-purpose register files (GRF) in an ASIC-based SOC implemented in a N28 CMOS technology, which has roughly a 2 similar to 3 X smaller area, 2 X faster speed, and 5 X lower power than a logic synthesized version. Synthesized and custom GRFs also have a different read behavior from static and dynamic circuitry used, respectively. This is addressed by modifying a bypass control block. Hardware showed a DVFS window of 0.5 V @ccuit, 130 MHz to 0.96 V, 3.2 GHz.Item type:Item, Vehicular Signal Transmission Using Power Line Communications(2012) ;Chen, Yen-Chang ;Tsai, Shang-Ho ;Yang, Kai-Jiun ;Ho, Ping-FanTseng, Kuo-FengWe propose a power line communication (PLC) system for transmitting control signals in vehicle through internal power lines, such that the internal wires can be reduced and the vehicles can be lighter. The signals from different devices are multiplexed and modulated to the power lines by the transmitter. In the receiver, first the noise within power lines are filtered. Afterwards the multiplexed signals are selectively extracted by specific codes which are minimally correlated. Finally the control signals are restored from the error-control coded bits which make the information more robust. The maximum data rate of the chip is 50 kbps, and the die area is 3.74 mm(2) using a TSMC 0.18 mu m standard cell library with power consumption 22.49 mW.