Browsing by Author "Virbila, Gabriel"

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A 0.56 THz Phase-Locked Frequency Synthesizer in 65 nm CMOS Technology
(2016-12-01)
Zhao, Yan
;
Chen, Zuow-Zun
;
Du, Yuan
;
Li, Yilei
;
Al Hadi, Richard
This paper presents the design and characterization of a 0.56 THz frequency synthesizer implemented in standard 65 nm CMOS technology. Its front end consists of triple-push Colpitts oscillators (TPCOs), followed by the first and second stage injection locking frequency dividers (ILFDs) and a divide-by-16 chain. TPCOs are used to triple their fundamental frequencies to 0.53-0.56 THz, while ILFDs and the subsequent divider chain are used to divide such frequencies to 2.7-2.9 GHz. Its back end consists of separate frequency and phase-locked loops with unique CMOS circuit designs to accomplish the desirable frequency/phase locking, including: 1) band-selection inductor switches; 2) simultaneous bulk voltage tuning over TPCOs and the first ILFD; and 3) a dual port injection architecture for the first ILFD. The resultant prototype realizes a 21 GHz frequency locking range with phase noise lower than -74 dBc/Hz at 1 MHz offset, and consumes 174 mW dc power.
A 0.56 THz Phase-Locked Frequency Synthesizer in 65 nm CMOS Technology
(2016-12)
Zhao, Yan
;
Chen, Zuow-Zun
;
Du, Yuan
;
Li, Yilei
;
Al Hadi, Richard
This paper presents the design and characterization of a 0.56 THz frequency synthesizer implemented in standard 65 nm CMOS technology. Its front end consists of triple-push Colpitts oscillators (TPCOs), followed by the first and second stage injection locking frequency dividers (ILFDs) and a divide-by-16 chain. TPCOs are used to triple their fundamental frequencies to 0.53-0.56 THz, while ILFDs and the subsequent divider chain are used to divide such frequencies to 2.7-2.9 GHz. Its back end consists of separate frequency and phase-locked loops with unique CMOS circuit designs to accomplish the desirable frequency/phase locking, including: 1) band-selection inductor switches; 2) simultaneous bulk voltage tuning over TPCOs and the first ILFD; and 3) a dual port injection architecture for the first ILFD. The resultant prototype realizes a 21 GHz frequency locking range with phase noise lower than -74 dBc/Hz at 1 MHz offset, and consumes 174 mW dc power.
A 205 GHz Serial Direct-Sequence Spread Spectrum (DS/SS) Radar System-on-Chip in 28nm CMOS
(2019-01-01)
Tang, Adrian
;
Kim, Yanghyo
;
Virbila, Gabriel
;
Chang, M. -C. Frank
;
交大名義發表
We present a 205 GHz serial direct-sequence spread spectrum (DS/SS) radar that employs time-domain digital correlation instead of frequency chirps or pulses to estimate a radar signal's time of flight. DS/SS radars offer much simpler range demodulation compared with FMCW or pulse compression radars, while still delivering excellent ranging performance. The demonstrated system offers 4.5 GHz of spread spectrum bandwidth leading to a range resolution of 3.3 cm. The radar is implemented in 28nm CMOS technology and consumes 614 mW.
An Integrated 0.56THz Frequency Synthesizer with 21GHz Locking Range and-74dBc/Hz Phase Noise at 1MHz Offset in 65nm CMOS
(2016)
Zhao, Yan
;
Chen, Zuow-Zun
;
Virbila, Gabriel
;
Xu, Yinuo
;
Al Hadi, Richard
Compact Non-Invasive Millimeter-Wave Glucose Sensor
(2015)
Siegel, Peter H.
;
Tang, Adrian
;
Virbila, Gabriel
;
Kim, Yanghyo
;
Chang, M. C. Frank
The authors describe a compact non-invasive CMOS-circuit-based glucose monitor using millimeter-wave transmission for use on animal and human subjects. Using an earlier device, in vivo measurements were performed through the ear in anesthetized animals and correlated with blood glucose concentration from test strips. In addition, millimeter wave absorption through glucose-containing solutions was measured in specialized liquid transmission cells and is shown to correlate with the animal and separate in vitro data. Design and performance information on the CMOS transceiver are given.