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Browsing by Author "WU, SJ"

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    DEVICE AND CIRCUIT SIMULATION OF ANOMALOUS DX TRAP EFFECTS IN DCFL AND SCFL HEMT INVERTERS
    (1993-11-01)
    WANG, TH
    ;
    WU, SJ
    ;
    HUANG, CM
    ;
    交大名義發表
    ;
    電子工程學系及電子研究所
    An integrated device and circuit analysis has been developed to evaluate the DX trap induced anomalous transient phenomena in DCFL and SCFL AlGaAs/GaAs HEMT inverters. The slow transient effect and the hysteretic characteristics of the input-output voltage transfer function in the inverters are simulated. The result shows that in comparison with the DCFL inverter, the DX trap effects are much improved in the SCFL inverter due to its particular operational principle.