Browsing by Author "Wan, Chih-Jen"

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Monolithic 3D Chip Integrated with 500ns NVM, 3ps Logic Circuits and SRAM
(2013)
Shen, Chang-Hong
;
Shieh, Jia-Min
;
Wu, Tsung-Ta
;
Huang, Wen-Hsien
;
Yang, Chih-Chao
For the first time, a sequentially processed sub-50nm monolithic 3D IC with integrated logic/NVM circuits and SRAM is demonstrated using multiple layers of ultrathin-body (UTB) MOSFET-based circuits interconnected through 300nm-thick interlayer dielectric (ILD). High-performance sub-50nm UTB MOSFETs using deposited ultra-flat and ultra-thin (20nm) epi-like Si enable across-layer and in-layer high-speed 3ps logic circuits and 1-T 500ns plasma-MONOS NVMs as well as 6T SRAMs with static noise margin (SNM) of 280 mV and reduced footprint by 25%. Closely stacked monolithic 3D circuits envision advanced high-performance, rich function, and low power intelligent mobile devices.