Browsing by Author "Wang, Chao-Lung"

Now showing 1 - 18 of 18

A Novel SONOS Memory With Recessed-Channel Poly-Si TFT via Excimer Laser Crystallization
(2012-04-01)
Lee, I-Che
;
Tsai, Chun-Chien
;
Kuo, Hsu-Hang
;
Yang, Po-Yu
;
Wang, Chao-Lung
A silicon-oxide-nitride-oxide-silicon memory with recessed-channel (RC) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) via excimer-laser crystallization (ELC) has been demonstrated to achieve a high mobility of similar to 400 cm(2)/V . s and a large ON/OFF current ratio of similar to 10(8). Such a high performance is because the RC poly-Si TFTs possess only one perpendicular grain boundary (GB) in the channel and the corresponding protrusion at this GB. In addition, the proposed devices also exhibited the largest memory window of 2.63 V in 10 ms with respect to 2.37 and 1.31 V for the conventional-ELC and solid-phase-crystallized ones, respectively. Since the silicon grain growth could be artificially controlled, the device-to-device uniformity could be significantly improved. Therefore, such a simple scheme is promising for applications of low-temperature poly-Si TFTs in 3-D ICs and system on panel.
Effects of crystallization mechanism on the electrical characteristics of green continuous-wave-laser-crystallized polycrystalline silicon thin film transistors
(2013-07-29)
Chou, Chia-Hsin
;
Lee, I-Che
;
Yang, Po-Yu
;
Hu, Ming-Jhe
;
Wang, Chao-Lung
Thin film transistors (TFTs) with amorphous silicon films crystallized via continuous-wave green laser at a wavelength of 532 nm exhibit very different electrical characteristics in various crystallization regions, corresponding to the Gaussian energy density distribution of the laser beam. In the center region subjected to the highest energy density, the full melting scheme led to the best crystallinity of the polycrystalline silicon film, resulting in the highest field-effect mobility of 500 cm(2) V-1 s(-1). In contrast, the edge region that resulted in solid phase crystallization exhibited the worst mobility of 48 cm 2 V-1 s(-1) for the polycrystalline silicon TFTs. (C) 2013 AIP Publishing LLC.
Formation and characterization of high-performance silicon thin-film transistors with and without location-controlled grain boundary
(2017-10-01)
Liao, Chan-Yu
;
Lin, Hsiao-Chun
;
Wang, Chao-Lung
;
Lee, I-Che
;
Chou, Chia-Hsin
This paper reports the demonstration of structural effects on excimer laser crystallization (ELC) for the Si strip with a recessed-channel structure on the silicon nitride under-layer (RCS-ULN). We revealed that a single location-controlled grain boundary (GB) oriented normal to the Si strip in the middle site without any other GB in the recessed region can be attained via ELC for the RCS-ULN structures with a short recessed region between neighboring long thick regions in a narrow Si strip. This can be attributed to the effective production of a significant 2D lateral thermal gradient in the recessed region and neighboring thick regions. Consequently, the RCS-ULN TFTs fabricated at the position one-half of such an optimal recessed region can achieve a superior field-effect mobility of 670 cm(2) V-1 . s(-1) with minor performance variations since the single-crystal-like Si channel has been adopted.
High Sensitivity of Dry-Type Nanowire Sensors With High-k Dielectrics for pH Detection via Capillary Atomic Force Microscope Tip Coating Technique
(2012-09-01)
Cheng, Huang-Chung
;
Wu, Chun-Yu
;
Hsu, Po-Yen
;
Wang, Chao-Lung
;
Liao, Ta-Chuan
Dry-type poly-Si nanowire pH sensors with high-k dielectrics have been demonstrated with the aid of novel focus ion beam engineered capillary atomic force microscopy (C-AFM) tip. By means of this C-AFM tip coating technique, the relatively few testing solutions can be transferred onto the surface of a nanowire, preventing the sensor device from the immersion in the liquid and therefore suppressing the possible leakage current from the testing solution. As compared with the TEOS SiO2, the pH sensors comprising Al2O3, TiO2, and HfO2 high-k materials exhibit the better sensitivities due to their enhanced capacitances. The best sensitivity (138.7 nA/pH) and linearity (99.69%) for a HfO2 dielectric can be ascribed to the higher k value and larger bandgap with respect to the Al2O3 and TiO2, accordingly. Consequently, the C-AFM tip coating technique incorporating with HfO2 dielectric suggests the potential for the detection of a minute quantity of biomedicines.
High-Performance Bottom-Gate Poly-Si Polysilicon-Oxide-Nitride-Oxide-Silicon Thin Film Transistors Crystallized by Excimer Laser Irradiation for Two-Bit Nonvolatile Memory Applications
(2012-07-01)
Lee, I-Che
;
Kuo, Hsu-Hang
;
Tsai, Chun-Chien
;
Wang, Chao-Lung
;
Yang, Po-Yu
High-performance bottom-gate (BG) poly-Si polysilicon-oxide-nitride-oxide-silicon (SONOS) TFTs with single grain boundary perpendicular to the channel direction have been demonstrated via simple excimer-laser-crystallization (ELC) method. Under an appropriate laser irradiation energy density, the silicon grain growth started from the thicker sidewalls intrinsically caused by the bottom-gate structure and impinged in the center of the channel. Therefore, the proposed ELC BG SONOS TFTs exhibited superior transistor characteristics than the conventional solid-phase-crystallized ones, such as higher field effect mobility of 393 cm(2)/V-s and steeper subthreshold swing of 0.296 V/dec. Due to the high field effect mobility, the electron velocity, impact ionization, and conduction current density could be enhanced effectively, thus improving the memory performance. Based on this mobility-enhanced scheme, the proposed ELC BG SONOS TFTs exhibited better performance in terms of relatively large memory window, high program/erase speed, long retention time, and 2-bit operation. Such an ELC BG SONOS TFT with single-grain boundary in the channel is compatible with the conventional a-Si TFT process and therefore very promising for the embedded memory in the system-on-panel applications.
High-Performance Excimer-Laser-Crystallized Polycrystalline Silicon Thin-Film Transistors with the Pre-Patterned Recessed Channel
(2012-06-01)
Wang, Chao-Lung
;
Cheng, Huang-Chung
;
Lee, I-Che
;
Wu, Chun-Yu
;
Cheng, Yu-Ting
High-performance polycrystalline silicon (poly-Si) thin-film transistors (TFTs) have been achieved using an excimer laser crystallization method on a prepatterned recessed channel (RC). Such a prepatterned RC TFT exhibited an excellent field-effect mobility of 412 cm(2) V-1 s(-1) and an on/off current ratio higher than 1:1 x 10(8) as compared with 125 cm(2) V-1 s(-1) and 2:2 x 10(7) for the conventional ones, respectively. This is attributed to the two-dimensional control of the grain boundary location and the resultant cross-shaped grain boundary structures within the recessed regions. Therefore, the prepatterned RC TFTs with only one grain boundary parallel to the channel direction as the TFTs could be fabricated to avoid the perpendicular grain boundary. This technology is thus promising for the future applications of poly-Si TFTs in the system-on-panel (SOP) and three-dimensional integrated circuits (3D-ICs). (C) 2012 The Japan Society of Applied Physics
High-performance polycrystalline silicon thin-film transistors prepared via the laser crystallization of the prepatterned channel layer on the bottom-gate structure
(2013-02-01)
Wang, Chao-Lung
;
Lee, I-Che
;
Wu, Chun-Yu
;
Cheng, Yu-Ting
;
Yang, Po-Yu
High-performance polycrystalline silicon thin-film transistors (TFTs) using an excimer laser crystallization of the prepatterned channel layer on the bottom-gate (BG) structure were fabricated to exhibit a field-effect mobility as high as 339 cm(2)/V s and an on/off current ratio of 9.5x10(7) with respect to 102 cm(2)/V s and 1.5x10(7) for the conventional top-gate (TG) TFTs, respectively. Such a superior performance is attributed to the cross-shaped grain boundary structure formed in the channel region owing to the two-dimensional location control of grain boundaries. Moreover, the prepatterned BG TFTs show better device-to-device uniformity than the conventional TG ones due to the manipulated grain boundaries. This technology is thus promising for the future applications of system-on-panel and three-dimension integrated circuits. (C) 2012 Elsevier B.V. All rights reserved.
High-Performance Polycrystalline Silicon Thin-Film Transistors with Two-Dimensional Location Control of the Grain Boundary via Excimer Laser Crystallization
(2012-07-01)
Wang, Chao-Lung
;
Lee, I-Che
;
Wu, Chun-Yu
;
Liao, Chan-Yu
;
Cheng, Yu-Ting
High-performance low-temperature polycrystalline silicon (Poly-Si) thin-film transistors (TFTs) have been fabricated with two-dimensional (2-D) location-controlled grain boundaries using excimer laser crystallization (ELC). By locally increased thickness of the amorphous silicon (a-Si) film that was served as the seed crystals with a partial-melting crystallization scheme, the cross-shaped grain boundary structures were produced between the thicker a-Si grids. The Poly-Si TFTs with one parallel and one perpendicular grain boundary along the channel direction could therefore be fabricated to reach excellent field-effect mobility of 530 cm(2)/V-s while the conventional ones exhibited field-effect mobility of 198 cm(2)/V-s. Furthermore, the proposed TFTs achieved not only superior electric properties but also improved uniformity as compared with the conventional ones owing to the artificially controlled locations of grain boundaries.
High-Performance Polycrystalline-Silicon Nanowire Thin-Film Transistors With Location-Controlled Grain Boundary via Excimer Laser Crystallization
(2012-11-01)
Wang, Chao-Lung
;
Lee, I-Che
;
Wu, Chun-Yu
;
Chou, Chia-Hsin
;
Yang, Po-Yu
High-performance polycrystalline-silicon (poly-Si) nanowire (NW) thin-film transistors (TFTs) are demonstrated using excimer laser crystallization to control the locations of grain boundaries two-dimensionally. Via the locally increased thickness of the amorphous-silicon (a-Si) film as the seeds, the cross-shaped grain boundary structures were produced among these thicker a-Si grids. The NW TFTs with one primary grain boundary perpendicular to the channel direction could be therefore fabricated to achieve an excellent field-effect mobility of 346 cm(2)/V . s and an on/off current ratio of 3 x 10(9). Furthermore, the grain-boundary-location-controlled NW TFTs also exhibited better reliability due to the control of grain boundary locations. This technology is thus promising for applications of low-temperature poly-Si TFTs in system-on-panel and 3-D integrated circuits.
High-Performance Single-Crystal-Like Strained-Silicon Nanowire Thin-Film Transistors via Continuous-Wave Laser Crystallization
(2015-04-01)
Chou, Chia-Hsin
;
Chan, Wei-Sheng
;
Lee, I-Che
;
Wang, Chao-Lung
;
Wu, Chun-Yu
High-performance polycrystalline-silicon nanowire (NW) thin-film transistors (TFTs) have been demonstrated via continuous-wave laser crystallization (CLC) to exhibit the low subthreshold swing of 216 mV/decade and high ON/OFF ratio of 1.6x10(9). In addition, the thermal stress of similar to 800 MPa induced from the CLC process also contributed to the single-crystal-like silicon NW CLC TFTs to achieve an excellent field-effect mobility of up to 900 cm(2)V(-1)s(-1).
High-performance vertically stacked bottom-gate and top-gate polycrystalline silicon thin-film transistors for three-dimensional integrated circuits
(2012-11-01)
Lee, I-Che
;
Tsai, Tsung-Che
;
Tsai, Chun-Chien
;
Yang, Po-Yu
;
Wang, Chao-Lung
The three-dimensional CMOS inverter with top-gate (TG) poly-Si thin film transistors (TFTs) vertically stacked on the bottom-gate (BC) poly-Si TFTs have been proposed to achieve high-performance characteristics via excimer laser crystallization (ELC) for the first time. Under an appropriate laser irradiation energy density, the silicon grain growth could be controlled from the sidewalls of the bottom-gate structure and thus the high-quality laterally grown poly-Si film with single perpendicular grain boundary in the channel would be formed for the BC TFTs. In addition, a simple ELC method was also utilized to the top-layered poly-Si film for TG TFTs as compared with solid-state-crystallized (SPC) ones. As a result, the field-effect mobilities of the proposed n-type BC and p-type TG TFTs could be significantly increased to be 390 and 131 cm(2)/V s, respectively, in contrast to 32.3 and 14.7 cm(2)/V s for the SPC ones, accordingly. Furthermore, such three-dimensional (3-D) TFT have also been employed to demonstrate the inverter devices and is suitable for future 3-D ICs as well as system-on-panel applications. (c) 2012 Elsevier Ltd. All rights reserved.
High-Performance ZnO Thin-Film Transistors with Location-Controlled Crystal Grains Fabricated by Low-Temperature Hydrothermal Method
(2012-07-01)
Yang, Po-Yu
;
Wang, Jyh-Liang
;
Tsai, Wei-Chih
;
Chang, Yu-Cheng
;
Wang, Shui-Jinn
In this paper, high-performance bottom-gate (BG) thin-film transistors (TFTs) with zinc oxide (ZnO) artificially location-controlled lateral grain growth have been prepared via low-temperature hydrothermal method. For the proper design of source/drain structure of ZnO/Ti/Pt thin films, the grains can be laterally grown from the under-cut ZnO beneath the Ti/Pt layer. Consequently, the single one vertical grain boundary perpendicular to the current flow will be produced in the channel region as the grown grains from the source/drain both sides are impinged. As compared with the conventional sputtered ZnO BG-TFTs, the proposed location-controlled hydrothermal ZnO BG-TFTs (W/L = 250 mu m/10 mu m) demonstrated the higher field-effect mobility of 6.09 cm(2)/V.s, lower threshold voltage of 3.67 V, higher on/off current ratio above 10(6), and superior current drivability, reflecting the high-quality ZnO thin films with less grain boundary effect in the channel region.
Location-Controlled Single-Crystal-Like Silicon Thin-Film Transistors by Excimer Laser Crystallization on Recessed-Channel Silicon Strip With Under-Layered Nitride
(2016-09)
Liao, Chan-Yu
;
Lin, Hsiao-Chun
;
Wang, Chao-Lung
;
Lee, I-Che
;
Chou, Chia-Hsin
High-performance Si thin-film transistors (TFTs) on the recessed-channel Si strips with the under-layered nitride film have been fabricated using excimer laser crystallization (ELC). A nitride film was added as a light absorption layer to suppress solidification along the edge of the Si strip. Thus, only one primary grain boundary perpendicular to the Si strip formed in the middle of the recessed region during ELC. The single-crystal-like Si TFTs fabricated on one-half of the recessed region are capable of excellent field-effect mobility of 640 cm(2)/V-s, with only minor deviation.
Memory characteristics of laser-crystallized polycrystalline-silicon silicon-oxide-nitride-oxide-silicon thin-film transistor with location-controlled grain boundary perpendicular to the channel
(2012-06-11)
Lee, I-Che
;
Tsai, Chun-Chien
;
Kuo, Hsu-Hang
;
Yang, Po-Yu
;
Wang, Chao-Lung
An excimer-laser-crystallized polycrystalline-silicon silicon-oxide-nitride-oxide-silicon thin-film transistor with recessed-channel structure has been designed to achieve only one grain boundary with a protrusion perpendicular to the channel for investigating the grain boundary location effects on the memory characteristics. After programming, the devices demonstrated better memory characteristics as the grain boundary was allocated near the source junction. In contrast, the memory characteristics were degraded when the grain boundary was located near the drain junction. The phenomenon was explained by the 2-D device simulation and the energy band diagrams. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4724314]
Novel junctionless silicon-oxide-nitride-oxide-silicon memory devices with field-enhanced poly-Si nanowire structure
(2015-08-01)
Chou, Chia-Hsin
;
Chan, Wei-Sheng
;
Wu, Chun-Yu
;
Lee, I-Che
;
Liao, Ta-Chuan
In this work, a novel gate-all-around (GAA) low-temperature poly-Si (LTPS) junctionless (JL) silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory device with a field-enhanced nanowire (NW) structure has been proposed to improve the programing/erasing (P/E) performance. Each nanowire has three sharp corners fabricated by a sidewall spacer formation technique to obtain high local electrical fields. Owing to the higher carrier concentration in the channel and the high local electrical field from the three sharp corners, such a JL SONOS memory device exhibits a significantly enhanced P/E speed, a larger memory window, and better data retention properties than a conventional inversion mode NW-channel memory device. (C) 2015 The Japan Society of Applied Physics
Polysilicon Nanowire Sensor Devices Based on High-k Dielectric Membrane for pH Sensing and DNA Detection
(2012)
Wu, Chun-Yu
;
Hsu, Po-Yen
;
Wang, Chao-Lung
;
Liao, Ta-Chuan
;
Cheng, Huang-Chung
The pH sensing characteristics of poly-Si nanowires with high-k sensing membranes are investigated. As a result, the sensing membrane of HfO2 exhibits higher sensitivity and better reproducibility test as compared with TEOS SiO2, Al2O3, TiO2 films. The sensor device with HfO2 dielectric membrane reveals a great pH sensitivity of 172.8 nA/pH. In additon, the label-free DNA detection ability of the poly-Si nanowires is also demonstrated. The 10-base-long single-strained homopolymers DNA molecule solution with an ultra-low concentration of 0.01nM can be detected by using HfO2 sensing film. Such a poly-Si nanowires structure with HfO2 sensing membrane is very suitable for future biochemical sensors applications.
Reliability improvement of InGaZnO thin film transistors encapsulated under nitrogen ambient
(2012-04-09)
Wu, Chun-Yu
;
Cheng, Huang-Chung
;
Wang, Chao-Lung
;
Liao, Ta-Chuan
;
Chiu, Po-Chun
The nitrogen ambient encapsulation (NAE) technique is introduced to improve the reliability issue for the amorphous InGaZnO (a-IGZO) thin-film transistors under positive gate bias stress (PGBS). For the NAE devices, the threshold voltage (Vth) shift is significantly decreased from 1.88 to 0.09 V and the reduction of saturation drain current is improved from 15.75 to 5.61 mu A as compared to the bare a-IGZO counterparts after PGBS. These improvements are attributed to the suppression of negatively charged oxygen adsorption on the a-IGZO backsurface and thereby well maintain the channel potential of NAE devices, which in turn sustain the Vth during PGBS. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.3702794]
The mechanism of the surface morphology transformation for the carbon nanotube thin film irradiated via excimer laser
(2013-05-06)
Chien, Yun-Shan
;
Lee, I-Che
;
Yang, Po-Yu
;
Wang, Chao-Lung
;
Tsai, Wan-Lin
In this paper, the surface morphology transformation of the sprayed carbon nanotube (CNT) thin film irradiated with the excimer laser has been systematically investigated. Under the excimer-laser irradiation, two phenomena, including the annealing and ablation effects, were found to be dependent on the incident laser energy and overlapping ratios. Moreover, the extremely high protrusions would be produced in the interface between the annealing and ablation regions. The mechanism of the CNT thin film under the excimer laser irradiation was, therefore, proposed to derive the surface morphology modifications and the further reinforced crystallinity with proper laser energy densities and overlapping ratios. (C) 2013 AIP Publishing LLC.