Browsing by Author "Wang, Chen-Chao"
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Item type:Item, Multi-Layer Adaptive Power Management Architecture for TSV 3DIC Applications(2013) ;Chang, Ming-Hung ;Hsieh, Wei-Chih ;Wu, Pei-Chen ;Chuang, Ching-TeChen, Kuan-NengIn this work, a multi-layer hierarchical distributed power delivery architecture for TSV 3DIC is proposed. By decoupling global and local power networks, the proposed power delivery architecture can be flexibly configured for different power requests. The decoupled power architectures can also greatly reduce the required decoupling capacitor sizes for voltage stabilization. Meanwhile, a multi-threshold CMOS switched capacitor DC-DC converter with up to 78% power efficiency is implemented in 65nm CMOS for hierarchical distributed power delivery architecture. An adaptive power management technique is presented to work in the local power network to increase the power efficiency. The proposed multi-layer hierarchical distributed power delivery architecture is also very useful for the heterogeneous integration in 3DIC chips.Item type:Item, Near-/Sub-V-th Process, Voltage, and Temperature (PVT) Sensors with Dynamic Voltage Selection(2013) ;Chang, Ming-Hung ;Lin, Shang-Yuan ;Wu, Pei-Chen ;Zakoretska, OlesyaChuang, Ching-TeA process, voltage and temperature (PVT) sensors with dynamic voltage selection are proposed for environmental management in the ultra-low voltage dynamic voltage and frequency scaling (DVFS) system. The process and voltage (PV) sensors initially monitor the process variation. With known process information, PV sensors can real-time provide voltage variation status. The temperature sensor has six temperature sensitive ring oscillators (TSROs) generating frequency proportional to temperature. It dynamically selects the proper TSRO to convert the frequency into digital readings according to voltage status provided by PV sensors. With known process and voltage information from PV sensors, a pure temperature measurement result can be obtained. The proposed PVT sensors are designed in TSMC 65nm CMOS technology. This work can be dynamically operated over an ultra-low voltage range from 0.25V to 0.5V. Only 2.3 mu W is consumed at 0.25V. They can achieve 0.15 degrees C resolution and 50k samples/sec conversion rate.