Browsing by Author "Wang, Hsiang-Fei"

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A low-power low-swing single-ended multi-port SRAM
(2007)
Yang, Hao-, I
;
Chang, Ming-Hung
;
Lai, Ssu-Yun
;
Wang, Hsiang-Fei
;
Hwang, Wei
In this paper, a new single-ended 6-T SRAM cell is proposed. It has a very strong static noise margin (SNM) during read cycles. Meanwhile, data can be easily written because of floating virtual ground and I-T equalizer insertion within cell. Low-swing writing ability is achieved by these two approaches. A single-ended current-mode sensing amplifier is also presented. This amplifier can sense a very small swing of bitline, equipping with a high noise-rejection and high PVT-tolerance ability. A low-swing 3-port 64x32-bit SRAM macro is simulated in TSMC 130nm CMOS technology. It consumes a minimum of 725 mu W and 658 mu W per-port at IGHz with 1.2V supply voltage for read and write power, respectively.