Browsing by Author "Wang, SD"

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A novel process-compatible fluorination technique with electrical characteristic improvements of poly-Si TFTs
(2005-06-01)
Wang, SD
;
Lo, WH
;
Chang, TY
;
Lei, TF
;
電子工程學系及電子研究所
A process-compatible fluorine passivation technique of poly-Si thin-film transistors (TFTs) was demonstrated by employing a novel CF4 plasma treatment. Introducing fluorine atoms into poly-Si films can effectively passivate the trap states near the SiO2/poly-Si interface. With fluorine incorporation, the electrical characteristics of poly-Si TFTs can be significantly improved including a steeper subthreshold slope, smaller threshold voltage, lower leakage current, higher field-effect mobility, and better On/Off current ratio. Furthermore, the CF4 plasma treatment also improves the reliability of poly-Si TFTs with respect to hot-carrier stress, which is due to the formation of strong Si-F bonds.
Adaptive symmetric mean filter: A new noise-reduction approach based on the slope facet model
(2001-10-10)
Huang, HC
;
Chen, CM
;
Wang, SD
;
Lu, HHS
;
統計學研究所
Two new noise-reduction algorithms, namely, the adaptive symmetric mean filter (ASMF) and the hybrid filter, are presented in this paper. The idea of the ASMF is to find the largest symmetric region on a slope facet by incorporation of the gradient similarity criterion and the symmetry constraint into region growing. The gradient similarity criterion allows more pixels to be included for a statistically better estimation, whereas the symmetry constraint promises an unbiased estimate if the noise is completely removed. The hybrid filter combines the advantages of the ASMF, the double-window modified-trimmed mean filter, and the adaptive mean filter to optimize noise reduction on the step and the ramp edges. The experimental results have shown the ASMF and the hybrid filter are superior to three conventional filters for the synthetic and the natural images in terms of the root-mean-squared error, the root-mean-squared difference of gradient, and the visual presentation. (C) 2001 Optical Society of America.
CF4 plasma treatment for fabricating high-performance and reliable solid-phase-crystallized poly-Si TFTs
(2005)
Wang, SD
;
Lo, WH
;
Lei, TF
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A CF4 plasma treatment on solid-phase-crystallized (SPC) poly-Si thin-film transistors ( TFTs ) has been demonstrated. Using this technique, fluorine atoms can be introduced into the poly-Si film to passivate the defects, and hence, the device performance of the SPC poly-Si TFTs can be significantly improved. The fluorinated SPC poly- Si TFTs exhibit a good subthreshold slope, low threshold voltage, and high field effect mobility. Moreover, the fluorinated SPC poly- Si TFTs also exhibit an improved hot-carrier-stress immunity, which is due to the strong Si-F bonds formed in the poly-Si channel region. (c) 2005 The Electrochemical Society.
Drain/gate-voltage-dependent on-current and off-current instabilities in polycrystalline silicon thin-film transistors under electrical stress
(2005-09-01)
Wang, SD
;
Chang, TY
;
Lo, WH
;
Sang, JY
;
Lei, TF
The On-current (I(on)) and Off-current (I(off)) instabilities of polycrystalline silicon thin-film transistors (poly-Si TFTs) were investigated under various stress conditions. The stress-induced device degradation was studied by measuring the dependences Of I(on) and I(off) on the drain/gate voltages. From the results, dissimilar variations in I(on) and I(off) were observed. The differences can be attributed to the variances in the amount of trap charges in the gate oxide and the spatial distributions of the trap states generated in the poly-Si channel. A comprehensive model for the degradation Of I(on) and I(off) in poly-Si TFTs under various electrical stress conditions was suggested.
Electrical characteristics and reliability of multi-channel polycrystalline silicon thin-film transistors
(2006-04-01)
Shieh, MS
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Sang, JY
;
Chen, CY
;
Wang, SD
;
Lei, TF
We demonstrate the fabrication process and the electrical characteristics of n-channel polycrystalline silicon thin-film transistors (poly-Si TFTs) with different numbers of channel stripes.-The device's electrical characteristics, such as on-current, threshold voltage, and subthreshold swing, were improved by increasing the number of channel stripes due to the enhancement of gate control. However, the electric field strength near the drain side was enlarged in multi-channel structures, causing severe impact ionization. The degradation of device's reliability under various electrical stress conditions was suggested.
Investigation of localized breakdown spots in thin SiO(2) using scanning capacitance microscopy
(2005)
Wang, SD
;
Chang, MN
;
Chen, CY
;
Lei, TF
;
電子工程學系及電子研究所
Scanning capacitance microscopy (SCM) was employed to observe the oxide breakdown sites. The localized breakdown spots obviously exhibit low differential capacitance signals. The observed area of the breakdown spots approximately ranges from 6 nm to 13 nm in lateral direction. According to contact-mode atomic force microscopy (AFM) image, the surface morphology has little effect on the SCM signal.
Observation of localized breakdown spots in thin SiO2 films using scanning capacitance microscopy
(2005)
Wang, SD
;
Chang, MN
;
Chen, CY
;
Lei, TF
;
電子工程學系及電子研究所
Scanning capacitance microscopy (SCM), combined with atomic force microscopy (AFM), was employed to investigate the dielectric breakdown phenomena in thin SiO2 films. The localized breakdown spots can be clearly imaged by the SCM technique. The spots exhibit signals with low differential capacitance (dC/dV) due to high conductivity. The diameters of these breakdown spots were approximately from 6 to 13.5 nm. Moreover, according to the corresponding AFM images, their surface morphology showed little change after the occurrence of oxide breakdown. (c) 2005 The Electrochemical Society. All rights reserved.