Browsing by Author "Wang, Shui-Jinn"

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Bias Temperature Instabilities for High-kappa HfO2 LTPS-TFTs With Dual Plasma Treatment
(2016-03)
Wu, Chien-Hung
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Huang, Bo-Wen
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Chang, Kow-Ming
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Chang, Ting-Chia
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Wang, Shui-Jinn
This study is the first to investigate different reliability mechanisms of high-performance low-temperature polycrystalline silicon thin-film transistors (TFTs) with a HfO2 gate dielectric before and after dual plasma treatment (DPT) under various bias temperature instability (BTI) stresses. DPT samples under positive bias temperature instability (PBI) and negative bias temperature instability (NBI) stresses exhibited different degradation phenomena because of the negative polarity trapped oxide charges and positive fixed oxide charges (Si+), respectively. In addition, experimental data exhibited better reliability immunity for PBI stress than NBI stress after DPT. Furthermore, we raised the temperature to clearly observe the effect of the PBTI stress analysis for samples with and without DPT. Extracted measurement results showed distinct time evolutions of the interface state densities (Nit) for samples with and without DPT, revealing the different mechanisms of Nit generation with and without DPT. Finally, we proposed a novel reliability mechanism called the quasi reaction-diffusion model to explain the generation of Delta N-it, which also explains the unclear phenomena of mobility boost.
Effect of Oxygen Annealing on the Ultraviolet Photoresponse of p-NiO-Nanoflower/n-ZnO-Nanowire Heterostructures
(2011-07-01)
Yang, Po-Yu
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Wang, Jyh-Liang
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Tsai, Wei-Chih
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Wang, Shui-Jinn
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Lin, Jia-Chuan
A transparent ultraviolet (UV) sensor using nanoheterojunctions (NHJs) composed of p-type NiO nanoflowers (NFs) and n-type ZnO nanowires (NWs) was prepared through a sequential low-temperature hydrothermal-growth process. The devices that were annealed in an oxygen (O(2)) ambient exhibited better rectification behavior (l(forward)/l(reverse) = 427), a lower forward threshold voltage (V(th) = 0.98 V), a lower leakage current (1.68 x 10(-5) A/cm(2)), and superior sensitivity (l(UV)/l(dark) = 57.8; l(visible)/l(dark) = 1.25) to UV light (lambda = 325 nm) than the unannealed devices. The remarkably improved device performances and optoelectronic characteristics of the annealed p-NiO-NF/n-ZnO-NW NHJs can be associated with their fewer structural defects, fewer interfacial defects, and better crystallinity. A stable and repeatable operation of dynamic photoresponse was also observed in the annealed devices. The excellent sensitivity and repeatable photoresponse to UV light of the hydrothermally grown p-NiO-NF/n-ZnO-NW NHJs annealed in a suitable O(2) ambient indicate that they can be applied to nano-integrated optoelectronic devices.
Effect of the Annealing Ambient on the Electrical Characteristics of the Amorphous InGaZnO Thin Film Transistors
(2012-07-01)
Huang, Yu-Chih
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Yang, Po-Yu
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Huang, Hau-Yuan
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Wang, Shui-Jinn
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Cheng, Huang-Chung
The influence of the thermal annealing on the amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) under different ambient gases has been systematically addressed. The chemical bonding states and transfer characteristics of a-IGZO TFTs show evident dependence on the annealing ambient gas. For the a-IGZO TFTs in the oxygen ambient annealing at 250 degrees C for 30 mins exhibited a maximum field effect mobility (max mu(FE)) of 9.36 cm(2)/V . s, on/off current ratio of 6.12 X 10(10), and a subthreshold slope (SS) of 0.21 V/decade. Respectively, the as-deposited ones without annealing possess a max mu(FE) of 6.61 cm(2)/V . s, on/off current ratio of 4.58 x 10(8), and a SS of 0.46 V/decade. In contrast, the a-IGZO TFTs annealed at 250 degrees C for 30 mins in the nitrogen ambient would be degraded to have a max mu(FE) of 0.18 cm(2)/V . s, on/off current ratio of 2.22 X 10(4), and a SS of 7.37 V/decade, corresponding. It is attributed to the content of the oxygen vacancies, according the x-ray photoelectron spectroscopy (XPS) analyze of the three different samples.
Field-Emission Characteristics of Al-Doped ZnO Nanostructures Hydrothermally Synthesized at Low Temperature
(2011-07-01)
Yang, Po-Yu
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Wang, Jyh-Liang
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Tsai, Wei-Chih
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Wang, Shui-Jinn
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Lin, Jia-Chuan
The aluminum-doped ZnO (AZO) nanostructures with different Al concentrations were synthesized on AZO/glass substrate via a simple hydrothermal growth method at a temperature as low as 85 degrees C. The morphologies, crystallinity, optical emission properties, and chemical bonding states of AZO nanostructures show evident dependence on the aluminum dosage. The morphologies of AZO nanostructures were changed from vertically aligned nanowires (NWs), and NWs coexisted with nanosheets (NSs), to complete NSs in respect of the Al-dosages of 0 similar to 3 at.%, 5 at.%, and 7 at.%, correspondingly. The undoped ZnO and lightly Al-doped AZO (<= 3 at.%) NWs are single-crystalline wurtzite structure. In contrast, heavily Al-doped AZO sample is polycrystalline. The AZO nanostructure with 3 at.% Al-dosages reveals the optimal crystallinity and less structural defects, reflecting the longest carrier lifetime and highest conductivity. Consequently, the field-emission characteristics of such an AZO emitter can exhibit the higher current density, larger field-enhancement factor (beta) of 3131, lower turn-on field of 2.17 V/mu m, and lower threshold field of 3.43 V/mu m.
High Field-Emission Stability of Offset-Thin-Film Transistor-Controlled Al-Doped Zinc Oxide Nanowires
(2011-04-01)
Yang, Po-Yu
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Wang, Jyh-Liang
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Tsai, Wei-Chih
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Wang, Shui-Jinn
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Lin, Jia-Chuan
Aluminum-doped zinc oxide (AZO) nanowire (NW) arrays incorporating an offset thin-film transistor (offset-TFT) have been proposed to achieve high field-emission (FE) stability. The AZO NW field emission arrays (FEAs) were hydrothermally grown at a low temperature of 85 degrees C. The uncontrolled AZO NW FEAs demonstrated superior FE characteristics (i.e., turn-on field of similar to 2.17 V/mu m and threshold field of similar to 3.43 V/mu m) compared with those of the conventional CNT FEAs grown at a temperature below 600 degrees C. However, uncontrolled AZO NW FEAs show a larger current fluctuation of 15.6%. Therefore, the offset-TFTs were used to control the AZO NW FEAs. Consequently, the fluctuation of AZO NW FEAs could be significantly reduced to less than 2%. This novel field emission device exhibits good emission stability, low-voltage controllability, low-temperature processing, and structural simplicity, making it promising for applications in flat panel displays. (C) 2011 The Japan Society of Applied Physics
High-Performance ZnO Thin-Film Transistors with Location-Controlled Crystal Grains Fabricated by Low-Temperature Hydrothermal Method
(2012-07-01)
Yang, Po-Yu
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Wang, Jyh-Liang
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Tsai, Wei-Chih
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Chang, Yu-Cheng
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Wang, Shui-Jinn
In this paper, high-performance bottom-gate (BG) thin-film transistors (TFTs) with zinc oxide (ZnO) artificially location-controlled lateral grain growth have been prepared via low-temperature hydrothermal method. For the proper design of source/drain structure of ZnO/Ti/Pt thin films, the grains can be laterally grown from the under-cut ZnO beneath the Ti/Pt layer. Consequently, the single one vertical grain boundary perpendicular to the current flow will be produced in the channel region as the grown grains from the source/drain both sides are impinged. As compared with the conventional sputtered ZnO BG-TFTs, the proposed location-controlled hydrothermal ZnO BG-TFTs (W/L = 250 mu m/10 mu m) demonstrated the higher field-effect mobility of 6.09 cm(2)/V.s, lower threshold voltage of 3.67 V, higher on/off current ratio above 10(6), and superior current drivability, reflecting the high-quality ZnO thin films with less grain boundary effect in the channel region.
Impact of high-k offset spacer in 65-nm node SOI devices
(2007-03-01)
Ma, Ming-Wen
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Wu, Chien-Hung
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Yang, Tsung-Yu
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Kao, Kuo-Hsing
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Wu, Woei-Cherng
In this letter, 65-nm node silicon-on-insulator devices with high-k, offset spacer dielectric were investigated by extensive 2-D device simulation. The result shows that the high-k, offset spacer dielectric can effectively increase the ON-state driving current I-ON and reduce the OFF leakage current I-OFF due to the high vertical fringing electric field effect. This fringing field can significantly improve the I-ON/I-OFF current ratio and the subthreshold swing compared with the conventional oxide spacer. Consequently, the gate-to-channel control ability is enhanced by the fringing field via the high-k offset spacer dielectric.
Improving Crystalline Silicon Solar Cell Efficiency Using Graded-Refractive-Index SiON/ZnO Nanostructures
(2015-01-01)
Tu, Yung-Chun
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Wang, Shui-Jinn
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Wu, Chien-Hung
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Chang, Kow-Ming
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Lin, Tseng-Hsing
The fabrication of silicon oxynitride (SiON)/ZnO nanotube (NT) arrays and their application in improving the energy conversion efficiency (eta) of crystalline Si-based solar cells (SCs) are reported. The SiON/ZnO NT arrays have a graded-refractive-index that varies from 3.5 (Si) to 1.9 similar to 2.0 (Si3N4 and ZnO) to 1.72 similar to 1.75 (SiON) to 1 (air). Experimental results show that the use of 0.4 mu m long ZnO NT arrays coated with a 150 nm thick SiON film increases Delta eta/eta by 39.2% under AM 1.5 G (100mW/cm(2)) illumination as compared to that of regular SCs with a Si3N4/micropyramid surface. This enhancement can be attributed to SiON/ZnO NT arrays effectively releasing surface reflection and minimizing Fresnel loss.
Investigation of Gate-Stacked In-Ga-Zn-O TFTs with Ga-Zn-O Source/Drain Electrodes by Atmospheric Pressure Plasma-Enhanced Chemical Vapor Deposition
(2018-03-01)
Wu, Chien-Hung
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Chang, Kow-Ming
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Chen, Yi-Ming
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Huang, Bo-Wen
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Zhang, Yu-Xin
Atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) was employed for the fabrication of indium gallium zinc oxide thin-film transistors (IGZO TFTs) with high transparent gallium zinc oxide (GZO) source/drain electrodes. The influence of post-deposition annealing (PDA) temperature on GZO source/drain and device performance was studied. Device with a 300 degrees C annealing demonstrated excellent electrical characteristics with on/off current ratio of 2.13x10(8), saturation mobility of 10 cm(2)/V-s, and low subthreshold swing of 0.2 V/dec. The gate stacked LaAlO3/ZrO2 of AP-IGZO TFTs with highly transparent and conductive AP-GZO source/drain electrode show excellent gate control ability at a low operating voltage.
Investigation of LaAlO3/ZrO2/a-InGaZnO thin-film transistors using atmospheric pressure plasma jet
(2014-04-24)
Wu, Chien-Hung
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Huang, Hau-Yuan
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Wang, Shui-Jinn
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Chang, Kow-Ming
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Hsu, Hsin-Yu
Amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO-TFTs) with the LaAlO3/ZrO2 gate dielectric stack employing a novel atmospheric pressure plasma jet process that results in small subthreshold swing and low threshold voltage are proposed and fabricated. The influence of post-deposition annealing (PDA) temperature on LaAlO3/ZrO2 gate dielectric stack and device performance was investigated. The equivalent oxide thickness of the LaAlO3/ZrO2 dielectric stack decreases from 11.5 nm without annealing to 7 nm after a 500 degrees C annealing was applied. The LaAlO3/ZrO2/a-InGaZnO TFT with a 500 degrees C annealing exhibits a small subthreshold swing of 77 mV.dec(-1), a high field-effect mobility of 9 cm(2).V-1.s(-1) and an excellent current ratio of 1.8 x 10(7), which could be attributed to the improved gate dielectric quality by the PDA. The LaAlO3/ZrO2/a-InGaZnO TFTs with excellent gate control ability allow the device to operate at a low operating voltage with low power consumption.
Low-Voltage-Driven Flexible InGaZnO Thin-Film Transistor With Small Subthreshold Swing
(2010-07-01)
Su, Nai-Chao
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Wang, Shui-Jinn
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Huang, Chin-Chuan
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Chen, Yu-Han
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Huang, Hao-Yuan
A flexible thin-film transistor (TFT) was made by integrating a high-kappa HfLaO gate dielectric and an amorphous-InGaZnO (a-IGZO) active layer on a polyimide substrate. This flexible HfLaO/a-IGZO TFT exhibits a low threshold voltage of 0.1 V, a small subthreshold swing of 0.18 V/dec, a high maximum saturation mobility of 22.1 cm(2)/V . s, and an acceptable ON/OFF current ratio of 2 x 10(5). The low threshold voltage and small subthreshold swing allow the device to operate at 1.5 V for low-power applications, which should enable significant future progress in energy efficiency.
Photoresponse of hydrothermally grown lateral ZnO nanowires
(2010-10-01)
Yang, Po-Yu
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Wang, Jyh-Liang
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Tsai, Wei-Chih
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Wang, Shui-Jinn
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Lin, Jia-Chuan
In this paper, a simple self-assembled lateral growth of ZnO nanowires (NWs) photodetector has been synthesized by a hydrothermal method at a temperature as low as 85 degrees C. The ZnO NWs exhibit single-crystalline wurtzite with elongated c-axis and can be selectively lateral self-assembled around the edges of ZnO seeding layer. The current of ZnO NWs is sensitive to the variation of ambient pressures, i.e. 4.47 mu A was decreased to 1.48 mu A with 5 V-bias as 1.1 x 10(-6) Torr changed to 760 Torr. accordingly. Moreover, the current voltage characteristics of ZnO NWs photodetectors can be evidently distinguished by UV illumination (i.e. lambda = 325 nm). The photocurrent of ZnO NWs with UV illumination is twice larger than dark current while the voltage biased at 5 V. Consequently, this faster photoresponse convinces that the hydrothermally grown lateral ZnO NWs devices have a fairly good for the fabrication of UV photodetectors. (C) 2010 Elsevier B.V. All rights reserved.
The Influence of NH3 Plasma Treatment on Al2O3/HfO2 Gate Dielectrics of TFTs with Atmospheric Pressure Plasma Jet Deposited IGZO Channel
(2014)
Huang, Hau-Yuan
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Wu, Chien-Hung
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Wang, Shui-Jinn
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Chang, Kow-Ming
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Hsu, Hsin-Yu
Indium-gallium-zinc-oxide (IGZO) thin-film transistors are fabricated by atmospheric pressure plasma jet (APPJ) technique. HfO2 (25 nm) and Al2O3 (25 nm) are used as the gate dielectric stack. NH3 plasma treatment is applied to optimize the device performance by reducing the gate dielectric leakage and increasing the oxide capacitance. The best performance of the APPJ IGZO TFT is obtained with a 30W-60s NH3 plasma treatment with field-effect mobility of 6.1 cm(2)/V-s, subthreshold swing of 0.19 V/dec, and on/off current ratio of 10(8).
The Investigation for In-Ga-Zn-O TFTs with Post Deposition of in-situ Ar/H-2 Plasma Treatment by Atmospheric Pressure Plasma Jet
(2016)
Chang, Kow-Ming
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Huang, Bo-Wen
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Wu, Chien-Hung
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Chen, Hsin-Ying
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Zheng, You-Xian
Atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) was applied for the fabrication of amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs). In this work, a-IGZO TFTs fabricated by AP-PECVD technique were firstly treated by post deposition of in-situ Ar/H-2 plasma with atmospheric pressure plasma Jet (APPJ). Compared to without plasma treatment, samples with the post in-situ Ar/H-2 plasma treatment on IGZO active layer exhibited higher mobility of 20.12 cm(2)/V.S, V-T of 1.11 V, lower subthreshold swing of 93 mV/decade, higher I-on/I-off of 5.34x10(7). The excellent IGZO TFTs fabricated by AP-PECVD technique also show highly transparent characteristics.
The Performance Improvement of N-2 Plasma Treatment on ZrO2 Gate Dielectric Thin-Film Transistors with Atmospheric Pressure Plasma-Enhanced Chemical Vapor Deposition IGZO Channel
(2016-06)
Wu, Chien-Hung
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Huang, Bo-Wen
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Chang, Kow-Ming
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Wang, Shui-Jinn
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Lin, Jian-Hong
The aim of this paper is to illustrate the N-2 plasma treatment for high-kappa ZrO2 gate dielectric stack (30 nm) with indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs). Experimental results reveal that a suitable incorporation of nitrogen atoms could enhance the device performance by eliminating the oxygen vacancies and provide an amorphous surface with better surface roughness. With N-2 plasma treated ZrO2 gate, IGZO channel is fabricated by atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) technique. The best performance of the AP-PECVD IGZO TFTs are obtained with 20 W-90 sec N-2 plasma treatment with field-effect mobility (mu(FET)) of 22.5 cm(2)/V-s, subthreshold swing (SS) of 155 mV/dec, and on/off current ratio (I-on/I-off) of 1.49x10(7).
The Role of High-kappa TiHfO Gate Dielectric in Sputtered ZnO Thin-Film Transistors
(2010)
Su, Nai-Chao
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Wang, Shui-Jinn
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Huang, Chin-Chuan
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Chen, Yu-Han
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Huang, Hao-Yuan
In this study, we demonstrate the role of a titanium hafnium oxide (TiHfO) gate dielectric in improving the overall electronic performance of a ZnO thin-film transistor (TFT). Ti(x)Hf(1-x)O (x = 0.63) was fabricated by the rf co-sputtering technique. Using TiHfO as the gate dielectric, the device fabricated in this study exhibits a threshold voltage of 0.34 V, a subthreshold swing of 0.23 V/dec, a field-effect mobility of 2.1 cm(2) V(-1) s(-1), and an ON/OFF current ratio of 10(5). The small subthreshold swing and low positive threshold voltage are attributed to the higher value of kappa of 40 for the dielectric. This result enables device operation below 2 V, allowing its use in low-power driving circuits in display applications. (C) 2010 The Japan Society of Applied Physics
Using KrF ELA to Improve Gate-Stacked LaAlO3/ZrO2 Indium Gallium Zinc Oxide Thin-Film Transistors with Novel Atmospheric Pressure Plasma-Enhanced Chemical Vapor Deposition Technique
(2018-03-01)
Wu, Chien-Hung
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Chang, Kow-Ming
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Chen, Yi-Ming
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Huang, Bo-Wen
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Zhang, Yu-Xin
Atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) technique and KrF excimer laser annealing (ELA) were employed for the fabrication of indium gallium zinc oxide thin-film transistors (IGZO-TFTs). Device with a 150 mJ/cm(2) laser annealing densities demonstrated excellent electrical characteristics with improved on/off current ratio of 4.7x10(7), high channel mobility of 10 cm(2)/V-s, and low subthreshold swing of 0.15 V/dec. The improvements are attributed to the adjustment of oxygen vacancies in the IGZO channel to an appropriate range of around 28.3% and the reduction of traps at the high-k/IGZO interface.
Zinc Oxide Thin-Film Transistors with Location-Controlled Crystal Grains Fabricated by Low-Temperature Hydrothermal Method
(2011-04-01)
Cheng, Huang-Chung
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Yang, Po-Yu
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Wang, Jyh-Liang
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Agarwal, Sanjay
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Tsai, Wei-Chih
High-performance zinc oxide (ZnO) bottom-gate (BG) thin-film transistors (TFTs) with a single vertical grain boundary in the channel have been successfully fabricated by a novel low-temperature (i.e., 85 degrees C) hydrothermal method. The ZnO active channel was laterally grown with an aluminum-doped ZnO seed layer underneath the Ti/Pt film. Consequently, such BG-TFTs (W/L = 250 mu m/10 mu m) demonstrated the high field-effect mobility of 9.07 cm(2)/V . s, low threshold voltage of 2.25 V, high on/off-current ratio above 10(6), superior current drivability, indistinct hysteresis phenomenon, and small standard deviations among devices, attributed to the high-quality ZnO channel with the single grain boundary.