Browsing by Author "Wang, T"

Now showing 1 - 10 of 10

Auger recombination enhanced hot carrier degradation in nMOSFETs with positive substrate bias
(2000)
Chiang, LP
;
Tsai, CW
;
Wang, T
;
Liu, UC
;
Wang, MC
Enhanced hot carrier degradation is observed in DTMOS-like operation mode. This phenomenon is attributed to Auger recombination assisted hot electron process. Measured hot electron gate current and light emission spectrum in nMOSFETs provide evidence that the high-energy tail of channel electrons is increased by the application of a positive substrate bias. As opposed to conventional hot carrier degradation, the Auger enhanced degradation exhibits positive temperature dependence and is more significant at low drain bias.
Deuterium effect on stress-induced leakage current
(1999-04-01)
Lin, BC
;
Cheng, YC
;
Chin, A
;
Wang, T
;
Tsai, C
We have studied and compared stress-induced leakage current in oxides subjected to H-2 and D-2 annealing. There is not much difference in stress-induced leakage current between thick 70-Angstrom-oxides annealed by these two isotopes. In sharp contrast, an improvement of several-fold in stress-induced leakage current is observed in 27-Angstrom-thick oxides annealed in D-2 ambient compared to that annealed in H-2. The significant improvement in this direct-tunneling oxide may be due to the passivation of intrinsic defects and dangling bonds in a transition SiOx layer.
Hot carrier degradation in LDMOS power transistors
(2004)
Cheng, CC
;
Wu, JW
;
Lee, CC
;
Shao, JH
;
Wang, T
The hot carrier performance of N-LDMOS and P-LDMOS transistors is evaluated. For N-LDMOS transistors, the drain current degradation is shown to be due to hot electron injection in the drift region field oxide (bird's beak edge). On the other hand, the hot carrier-damaged region of P-LDMOS transistors is within the channel region, and hot electron is also the source of degradation.
Low frequency noise degradation in ultra-thin oxide (I5A) analog n-MOSFETs resulting from valence-band tunneling
(2005)
Wu, JW
;
You, JW
;
Ma, HC
;
Cheng, CC
;
Hsu, C
Abnormal increase of low frequency flicker noise in analog n-MOSFETs with gate oxide in valence band tunneling domain is investigated. In 15 angstrom oxide devices, valence-band electron tunneling from Si substrate to poly-gate occurs at a positive gate voltage and results in the splitting of electron and hole quasi Fermi-levels in the channel. The excess low frequency noise is attributed to electron and hole recombination at interface traps between the two quasi Fermilevels. The trap capture and emission times in valence band tunneling domain are extracted from random telegraph signal. The dependence of measured trap times on gate voltage is consistent with our proposed model.
Low voltage high speed SiO(2)/AlGaN/AlLaO(3)/TaN memory with good retention
(2005)
Chin, A
;
Laio, CC
;
Chen, C
;
Chiang, KC
;
Yu, DS
To improve trapping using deeper well AlGaN (chi=3.8eV), lower voltage drop in high-K AlLaO(3) barrier (kappa=23), and smaller erase current by large Delta E(c) of AILaO(3)/TaN, the SiO(2)/AlGaN/AlLaO(3)/TaN devices show good 85 degrees C memory integrity of low +/- 10V 1ms P/E, large 3.9V initial Delta V(th) and 2.4V extrapolated 10-year retention. A fast 100ps P/E of +/- 11V still gives 3.0V initial Delta V(th) and 1.6V 10-year retention.
Positive bias and temperature stress induced two-stage drain current degradation in HfSiON nMOSFET's
(2005)
Chan, CT
;
Tang, CJ
;
Wang, T
;
Wang, HCH
;
Tang, DD
Positive bias and temperature (PBTI) stress induced drain current degradation in HfSiON gate dielectric nMOSFETs is investigated by using a transient measurement technique. The degradation exhibits two stages, featuring different degradation rate and stress temperature dependence. The drain current degradation in the first stage is attributed to the charging of pre-existing high-k dielectric traps while the degradation in the second stage is mainly due to additional high-k trap creation. Process effect on high-k trap growth is evaluated.
Process and doping species dependence of negative-bias-temperature instability for p-channel MOSFETs
(2002)
Lee, DY
;
Lin, HC
;
Chiang, WJ
;
Lu, WT
;
Huang, GW
The effects of poly-Si gate doping type and species on the negative-bias-temperature instability (NBTI) of p-channel MOS transistors were investigated. We found that, by properly suppressing boron penetration through careful thermal budget, NBTI can be reduced by proper fluorine incorporation. In addition, we found that NBTI is larger for devices with PMA annealing, thus clearly identified the role of hydrogen passivation in NBTI.
Single-electron emission of traps in HfSiON as high-k gate dielectric for MOSFETs
(2005)
Chan, CT
;
Tang, CJ
;
Kuo, CH
;
Ma, HC
;
Tsai, CW
A novel method for characterizing MOSFETs with HfSiON high-k gate dielectric is demonstrated for the first time by direct measurement of single-electron de-trapping. Individual high-k trapped electron emission is recorded, which is manifested by the step-like evolution of channel current. The physical path of electron de-trapping can be identified from the emission time of such single-electron de-trapping. The dependence of charge emission time on gate voltage and temperature is measured. An analytical model based on thermally assisted tunneling can predict the emission time behavior, trap activation energy, trap density, and total available traps in high-k gate dielectric.
Substrate bias dependence of breakdown progression in ultrathin oxide pMOSFETs
(2003-04-01)
Tsai, CW
;
Chen, MC
;
Gu, SH
;
Wang, T
;
電子工程學系及電子研究所
Negative substrate bias-enhanced oxide breakdown (BD) progression in ultrathin oxide (1.4 nm) pMOS is observed. The enhanced progression is attributed to the increase of hole-stress current resulting from BD-induced, channel-carrier heating. The carrier temperature extracted from the spectral distribution of hot-carrier luminescence is around 1300 K. The substrate bias dependence of post-BD hole-tunneling current is confirmed from measurement and calculation. The observed phenomenon is particularly significant to ultrathin gate oxide reliability in floating substrate (SOI) and forward-biased substrate devices.
Valence-band tunneling induced low frequency noise in ultrathin oxide (15 angstrom) n-type metal-oxide-semiconductor field effect transistors
(2004-11-22)
Wu, JW
;
You, JW
;
Ma, HC
;
Cheng, CC
;
Chang, CS
Low frequency flicker noise in n-type metal-oxide-semiconductor field effect transistors (n-MOSFETs) with 15 Angstrom gate oxide is investigated. A noise generation mechanism resulting from valence band tunneling is proposed. In strong inversion condition, valence-band electron tunneling takes place and results in the splitting of electron and hole quasi-Fermi levels in the channel. The excess low frequency noise is attributed to electron and hole recombination at interface traps between the two quasi-Fermi levels. Random telegraph signal in a small area device is characterized to support our model. (C) 2004 American Institute of Physics.