Browsing by Author "Wang, W. C."
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Item type:Item, Effect of graded-temperature arsenic prelayer on quality of GaAs on Ge/Si substrates by metalorganic vapor phase epitaxy(2011-10-24) ;Yu, H. W. ;Chang, E. Y. ;Yamamoto, Y. ;Tillack, B.Wang, W. C.The growth of GaAs epitaxy on Ge/Si substrates with an arsenic prelayer grown with graded temperature ramped from 300 to 420 degrees C is investigated. It is demonstrated that the graded-temperature arsenic prelayer grown on a Ge/Si substrate annealed at 650 degrees C not only improves the surface morphology (roughness: 1.1 nm) but also reduces the anti-phase domains' (APDs) density in GaAs epitaxy (dislocation density: similar to 2 x 10(7) cm(-2)). Moreover, the unwanted interdiffusion between Ge and GaAs epitaxy is suppressed by using the graded-temperature arsenic prelayer due to the low energy of the Ge-As bond and the use of a low V/III ratio of 20. (C) 2011 American Institute of Physics. [doi:10.1063/1.3656737]Item type:Item, Effect of substrate misorientation on the material properties of GaAs/Al(0.3)Ga(0.7)As tunnel diodes(2010-12-06) ;Yu, H. W. ;Chang, E. Y. ;Nguyen, H. Q. ;Chang, J. T.Chung, C. C.The effect of substrate misorientation on the material quality of the N(++)-GaAs/P(++)-AlGaAs tunnel diodes (TDs) grown on these substrates is investigated. It is found that the misorientation influences both surface roughness and interface properties of the N(++)-GaAs/P(++)-AlGaAs TDs. Smooth surface (rms roughness: 1.54 angstrom) and sharp interface for the GaAs/Al(0.3)Ga(0.7)As TDs were obtained when the (100) tilted 10 degrees off toward [111] GaAs substrate was used. Besides, the oxygen content in N(++)-GaAs and P(++)-AlGaAs layers grown on the 10 degrees off GaAs substrates was reduced due to the reduction of sticking coefficient and number of anisotropic sites. (C) 2010 American Institute of Physics. [doi:10.1063/1.3525158]Item type:Item, Effect of substrate misorientation on the material properties of GaAs/Al0.3Ga0.7As tunnel diodes(2010-12-06) ;Yu, H. W. ;Chang, E. Y. ;Nguyen, H. Q. ;Chang, J. T.Chung, C. C.The effect of substrate misorientation on the material quality of the N++-GaAs/P++-AlGaAs tunnel diodes (TDs) grown on these substrates is investigated. It is found that the misorientation influences both surface roughness and interface properties of the N++-GaAs/P++-AlGaAs TDs. Smooth surface (rms roughness: 1.54 angstrom) and sharp interface for the GaAs/Al0.3Ga0.7As TDs were obtained when the (100) tilted 10 degrees off toward [111] GaAs substrate was used. Besides, the oxygen content in N++-GaAs and P++-AlGaAs layers grown on the 10 degrees off GaAs substrates was reduced due to the reduction of sticking coefficient and number of anisotropic sites. (C) 2010 American Institute of Physics. [doi:10.1063/1.3525158]Item type:Item, Efficiency enhancement of GaN-based power-chip LEDs with sidewall roughness by natural lithography(2007) ;Huang, Hung-Wen ;Lai, C. F. ;Wang, W. C. ;Lu, T. C.Kuo, H. C.This study reports the development of GaN-based power-chip light-emitting diodes (LEDs) with sidewall roughness using natural lithography with polystyrene spheres as the etching mask. At an injection current of 350 mA, the LED with sidewall roughness increased the light output intensity of the InGaN/GaN multiple quantum well LEDs by a factor of 1.26, indicating that the LED with sidewall roughness had larger light extraction efficiency. The wall-plug efficiency of GaN-based LED was increased by 26.5% with sidewall roughness. After 1000 h life test, it was found that normalized output power of power-chip LED with sidewall roughness did not show any significant degradation. (c) 2006 The Electrochemical Society.Item type:Item, Enhancement of InGaN/GaN flip-chip ITO LEDs with incline sidewalls coated with TiO2/SiO2 omnidirectional reflector(2007) ;Chiu, C. H. ;Kuo, H. C. ;Lai, C. F. ;Huang, H. W.Wang, W. C.The light extraction enhancement of GaN-based flip-chip indium-tin oxide light-emitting diodes (FC ITO LEDs) with an inclined sidewall coated with TiO2/SiO2 omnidirectional reflectors (ODRs) is presented. At a driving current of 350 mA and a chip size of 1x1 mm, the light output power and the light extraction enhancement of the FC ITO LEDs coated TiO2/SiO2 ODRs with inclined sidewall reached 183 mW and 15% when compared with the results from the same device, FC ITO LEDs coated TiO2/SiO2 ODRs with vertical sidewall. Furthermore, by examining the radiation patterns of the FC ITO LEDs, the increased optical power within 150 degrees cone contributed to the stronger enhancement around the vertical direction of an inclined sidewall ODR within blue regime. Our work offers promising potential for enhancing output powers of commercial light-emitting devices. (c) 2007 The Electrochemical Society.Item type:Item, Patent Analysis of Key Technologies for Smart Retailing and their Projected Economic Impact(2018-01-01) ;Trappey, Amy J. C. ;Wang, W. C. ;Trappey, Charles ;Hsieh, H. I.管理科學系With the growing population of digital users gaining online consumption power, retail industries are facing evolutionary changes in attracting and maintaining online and offline customers. The concepts and implementation of smart malls and retail shops are proposed by retailers or solution providers to satisfy new customer demands. The foundation of smart retailing includes information integration, customer experience, and e-transactions. This research investigates the economic impact of smart retailing and the growth of related intellectual properties (IPs), specifically, the retail domain online related patents. The technological aspect of smart retailing is organized by constructing a patent ontology map to define the domain boundary. The economic impact of technological transformations is studied by measuring the economic growth of the leading regions and countries and the representative patent assignees. Consumption preferences and labor structure changes in relation to the retail industry are analyzed to verify the economic impact of corresponding intellectual properties. The goal of the research is to develop regional development strategies for smart retailing using global patent and economic impact analyses.