Browsing by Author "Wei, CH"
Now showing 1 - 20 of 37
- Results Per Page
- Sort Options
Item type:Item, A digital timing recovery scheme for TDMA digital mobile radio(1996) ;Liu, DZ ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsItem type:Item, A frequency acquisition scheme for OFDM systems(1996) ;Hsieh, MH ;Wei, CH ;交大名義發表 ;電子工程學系及電子研究所National Chiao Tung UniversityThis paper derives a frequency acquisition algorithm for orthogonal frequency division multiplexing (OFDM) systems. This frequency acquisition algorithm is a modification of the frequency tracking algorithm introduced in [1], which uses a repeated data symbol and a maximum likelihood estimation (MLE) algorithm to estimate the frequency offset. The estimate is extremely accurate but the acquisition range is limited to +/-1/2 of the intercarrier spacing. With some modifications of the frequency tracking scheme and an assumption of the multipath channel introduced in this paper, the frequency acquisition can be converted to an analogous PN sequence acquisition problem. Therefore, a partial-sum correlator with an appropriate threshold can be used to acquire the frequency offset.Item type:Item, A high-throughput VLSI architecture for LZFG data compression(2002-03-01) ;Chen, JM ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsThis paper presents a high-throughput VLSI architecture for LZFG data compression and decompression, To reduce the hardware cost and maintain both of the interior node and the leaf node numbering systems, we modify the original LZFG data structure. Compared to the original LZFG tree, the number of characters in our modified LZFG data structure must be greater than one to establish one new interior node down the root node (<^>) into the new node. Meanwhile, this architecture employs a series of encoding cells with content addressable memory (CAM) to search the longest match and maintain the LZFG data tree during the encoding and decoding processes. By using the parallel design, the compressor and decompressor can keep a constant high bit rate to encode and decode one character per clock cycle, that is, it is directly proportional to the operating clock rate, but independent of the sizes of the word dictionary and the input file. By using 0.25 mum CMOS silicon technology, the operating clock rate can be as high as 85 MHz. Some untargeted encoding cells will be disabled to reduce the power consumption during the comparison operation. Therefore, this architecture can be easily applied in the high-speed real-time communication and data storage systems.Item type:Item, A low-complexity frame synchronization and frequency offset compensation scheme for OFDM systems over fading channels(1999-09-01) ;Hsieh, MH ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsdThis paper presents a fast low-complexity synchronization scheme for orthogonal frequency division multiplexing (OFDM) systems over fading channels. By utilizing the guard interval in OFDM signals, the Frame synchronization and the frequency offset estimation are considered simultaneously. The Implementation can be simplified by only using the sign bits of the in-phase and the quadrature components of the received OFDM signal for frame synchronization and frequency offset compensation. A frequency-offset independent frame synchronization algorithm is derived, and a low-complexity frequency offset estimator based on the synchronized correlator output is presented in this paper. Due to the subcarrier ambiguity in the guard-interval-based (GIB) frequency detector, the maximum correctable frequency range is limited to +/- 1/2 of the subcarrier spacing. In this paper, we also present a new frequency acquisition scheme that can solve the subcarrier ambiguity problem and extend the frequency acquisition range to nearly a half of the useful OFDM signal bandwidth.Item type:Item, A multialphabet arithmetic coding with weighted history model(1995) ;Hsieh, MH ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsItem type:Item, A new blind adaptive interference suppression scheme for acquisition and MMSE demodulation of DS/CDMA signals(2000-05-01) ;Hwang, HC ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsIn this paper, we present an efficient blind algorithm for estimating the code timing of a desired user in an asynchronous direct-sequence code-division multiple-access (DS/CDMA) system over frequency-nonselective-fading channels. The proposed algorithm acquires the code timing explicitly and results in a near-far resistant minimum mean-squared error (MMSE) demodulation without requiring the knowledge of the timing information, amplitudes, and transmitted symbols of all transmissions, The only required knowledge is the information of the signature sequence used by the desired transmission. Several computer simulations are done for additive white Gaussian channels, Rayleigh fading channels, and two-ray Rayleigh fading multipath channels, respectively. Numerical results show that the new algorithm is near-far resistant to the multiple-access interference (MAI) in the DS/CDMA system.Item type:Item, A novel VLSI design for Ziv-Lempel data compression(1998) ;Chen, JM ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsIn this paper, we present a simple real-time parallel architecture for CMOS VLSI implementation of Ziv-Lempel (LZ type) data compression system. This encoding system employs a linear systolic array to find concurrently the matches between each input data character and its corresponding dictionary. A new encoding architecture is proposed to improve the encoding speed and reduce the hardware complexity for the encoding cells. The access time of memory is reduced to save its power consumption for high-speed applications. The encoder encodes one character( more than 8 bits)per encoding cycle. The clock rate by Verilog simulator can be constrainted below 12ns by 0.6um CMOS technology process.Item type:Item, A pipeline structure for high-speed step-by-step RS decoding(2003-02-01) ;Chen, TC ;Wei, CH ;Wei, SW ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsBased on a modified step-by-step decoding procedure, a high-speed pipelined Reed-Solomon decoder is presented. The decoder requires only the delay time of three 2-input XOR gates for decoding each coded symbol. The decoder can be operated in a bit rate of Gbits/sec order and thus suitable for the very high speed data transmission systems.Item type:Item, A polynomial-perceptron based decision feedback equalizer with a robust learning algorithm(1995-11-01) ;Chang, CH ;Siu, S ;Wei, CH ;電控工程研究所Institute of Electrical and Control EngineeringA new equalization scheme, including a decision feedback equalizer (DFE) equipped with polynomial-perceptron model of nonlinearities and a robust learning algorithm using l(p)-norm error criterion with p < 2, is presented in this paper, This equalizer exerts the benefit of using a DFE and achieves the required nonlinearities in a single-layer net. This makes it easier to train by a stochastic gradient algorithm in comparison with a multi-layer net. The algorithm is robust to aberrant noise for the addressed equalizer and, hence, converges much faster in comparison with the l(p)-norm. A detailed performance analysis considering possible numerical problem for p < 1 is given in this paper. Computer simulations show that the scheme has faster convergence rate and satisfactory bit error rate (BER) performance. It also shows that the new equalizer is capable of approaching the performance achieved by a minimum EER equalizer.Item type:Item, A pseudo-2D adaptive decision feedback equalizer for high density magnetic recording system(1995) ;Lee, YC ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsItem type:Item, A robust transform image coder over noisy channel(1998) ;Su, CH ;Hang, HM ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsIn this paper, we propose a robust quantizer design for image coding. Because the bits representing the reconstruction levels are transmitted directly to the channel, the proposed quantizer can be viewed as a compound of a quantizer, a VLC coder, and a channel coder. The conventional combined source/channel design produces a source coder designed for a channel with a specific channel noise. Our proposed quantizer is designed within a noise range. In comparison with the ordinary JPEG coder, simulation results show that our proposed scheme has a much more graceful distortion behavior within the designed noise range.Item type:Item, A two-stage Reed-Solomon decoder for coded 2(m)-QAM systems(2000) ;Chen, TC ;Wei, CH ;Wei, SW ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsA two-stage Reed-Solomon (RS) decoder for coded 2(m)-ary QAM systems is presented. This two-stage RS decoder consists of a modified step-by-step decoding algorithm as first-stage and a direct solution algorithm as second-stage. The computation complexity is reduced by a factor of (2(m)-1)/4, compared with the conventional step-by-step RS decoder.Item type:Item, Adaptive receiver for DS/CDMA communications over impulsive noise channels(1998-03-05) ;Hwang, HC ;Wei, CH ;電子工程學系及電子研究所 ;電信研究中心Department of Electronics Engineering and Institute of ElectronicsA new adaptive algorithm is proposed for training soft-limiter based correlation receiver in which the direct sequence code division multiple access signals corrupted by impulsive symmetric a-stable noise are demodulated. The new adaptation algorithm allows simpler implementation and faster convergence speed in comparison with the traditional adaptive stochastic gradient-based algorithms.Item type:Item, Adaptive variable step-size Griffiths' algorithm for blind demodulation of DS/CDMA signals(1999-10-01) ;Hwang, HC ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsThe minimum mean-squared error (MMSE) linear detector [1], [2] has been proposed to successfully suppress the multiple access interference and mitigate the near-far problem in direct-sequence code-division multiple access communication systems. In the presence of unknown or time-varying channel parameters, the MMSE linear detector can be implemented by the blind Griffiths' algorithm [3], which uses the desired signal vector instead of a training sequence of symbols for initial adaptation. In this paper, a variable step-size (VSS) Griffiths' algorithm is proposed for accelerating the convergence speed, especially in the presence of strong interference. Numerical results show that the convergence properties of the VSS Griffiths' algorithm are robust against the wide eigenvalue-spread problem of the correlation matrix associated with the received signal vector compared to the Griffiths' algorithm using a fixed step-size.Item type:Item, An acoustic echo canceller using lapped orthogonal transform(1997) ;Wei, CH ;Tsai, CP ;交大名義發表 ;電子工程學系及電子研究所National Chiao Tung UniversityIn the teleconference system or the hands-free telephone, the speech broadcasted from the loudspeaker can be transformed back to the talker as a far-end talker-echo. The far-end talker-echo can be eliminated by an acoustic echo canceller. An acoustic echo canceller based on the lapped orthogonal transform (LOT) using discrete Walsh-Hadamard transform (DWHT) as the building block for the fast algorithm is presented. The new structure can provide better ERLE and tracking capability than the structure using the LOT presented by Malver [6]. The computation complexity of the new structure is much lower than the orthogonal transform LMS structure.Item type:Item, An adaptive multialphabet arithmetic coding for video compression(1998-04-01) ;Hsieh, MH ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsIn this paper, the hardware implementation issues far an adaptive multialphabet arithmetic coder are discussed. A simple weighted history model is proposed to encode the video dare, This model uses a weighted finite buffer to model the cumulative density function of the arithmetic coder. The performance of the weighted history model is evaluated together with several other well-known models. To access, search, and update the cumulative frequencies corresponding to model symbols in real rime, we present a low complexity multibase cumulative occurrence array structure that can offer the probability information Tor high-speed encoding and decoding, for the application in video compression, the multialphabet arithmetic coding with weighted history model can be a good choice as the variable length coding of the video symbols.Item type:Item, Analysis of adaptive LMS estimator with cyclic sequences in complex frequency domain(1995-12-01) ;Liu, GS ;Wei, CH ;電控工程研究所 ;電信研究中心Institute of Electrical and Control EngineeringCyclic sequences are usually employed as the reference sequences in the adaptive filtering systems for signal or channel estimation, In this situation, the stability of an adaptive filter can be analyzed by an equivalent transfer function in complex frequency domain, For several special classes of cyclic reference sequences, the stability bounds of the adaptive filter with least mean-square (LMS) algorithm and its variants, leaky-LMS (L-LMS) and minimum output variance LMS (MOV-LMS), are obtained. Effects of these algorithms on the resultant transfer functions and the stability bounds are also investigated.Item type:Item, Asynchronous symbol timing recovery with adaptive interpolation filter for high data-rate digital mobile radio(2000) ;Liu, DZ ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsAn asynchronous symbol timing recovery with adaptive interpolation filter is investigated far high data-rate digital mobile radio. The timing error estimation employing a general type of nonlinearity is used to estimate the timing error by the discrete-time spectral method. An adaptive interpolation filter is adopted to mitigate both the timing error and inter-symbol interference (ISI) due to multipath fading. Computer simulations are employed to evaluate the performance of the symbol timing recovery over the environment with additive Gaussian noise (AWGN), carrier frequency offset and Rayleigh fading. The proposed timing synchronizer is well suited for burst mode, narrow-band, high data-rate digital mobile radio.Item type:Item, Blind adaptive algorithm for demodulation of DS/CDMA signals with mismatch(1999-02-01) ;Hwang, HC ;Wei, CH ;電子工程學系及電子研究所 ;電信研究中心Department of Electronics Engineering and Institute of ElectronicsThe minimum mean-squared error (MMSE) linear detector is known to be a near-far resistant strategy for direct-sequence code-division multiple access systems. The MMSE linear detector can be implemented adaptively by the MOE adaptation algorithm or the Griffiths' adaptation algorithm, which utilises the desired signal vector for initial adaptation instead of training sequences, The performance loss caused by the imprecise knowledge of the desired signal vector is investigated. A new blind adaptive algorithm is presented to mitigate the effect of the mismatch caused by the timing error in acquisition. Several;numerical results show that the new algorithm can provide a resistance to the effect of mismatch compared to the MOE and Griffiths' algorithms.Item type:Item, Channel estimation and compensation for preamble-assisted DAPSK transmission in digital mobile radio system(2001-03-01) ;Liu, DZ ;Wei, CH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsThis paper presents a novel channel estimation and compensation technique, combining fading estimation and frequency offset estimation, for preamble-assisted differentially encoded amplitude- and phase-shift keying (DAPSK) transmission in the digital mobile radio system. The received preamble symbols are used to estimate the combined distortions caused by multipath fading and frequency offset. The detected data symbols as well as preamble symbols are used to enhance the accuracy of the estimation process. The combined distortions can be compensated in the data symbols at the same time. The storage-delay time of the estimation process is only several symbols long. A series of computer simulations have been carried out to investigate the bit error rate performances of the preamble-assisted 16-DAPSK signals with uncertain frequency offset in the frequency-nonselective and frequency-selective Rayleigh fading channels.