Browsing by Author "Wu, Meng-Shuan"

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A Digital Background Calibration Scheme for Pipelined ADCs Using Multiple-Correlation Estimation
(2018-01-01)
Wu, Meng-Shuan
;
Hong, Hao-Chiao
;
電控工程研究所
;
Institute of Electrical and Control Engineering
This paper proposes a digital background calibration scheme for calibrating the linear and the third-order nonlinear gain errors of the residue amplifiers (RAs) in pipelined ADCs. It is based on a novel multiple-correlation estimation (MCE) technique. We define two correction parameters relating to the gain errors of the RA under calibration. By alternately injecting two bi-level pseudo-random signals with designated amplitudes to the RA through the sub-DAC, the desired correction parameters are estimated according to the correlations of the backend ADC's outputs and the injected pseudo-random signals. Two least-mean-square (LMS) loops are adopted to find and to track the optimal values of the correction parameters. Simulation results of a 12-bit pipelined ADC show that the SNDR is improved from 46.4 dB to 73.4 dB with the help of the proposed calibration design. The proposed calibration scheme has the advantages of simple implementation, no restriction on the input signal of the ADC, fast settling, and running in background.
Multiple Correlation Estimation Based Digital Background Calibration Scheme for Pipelined ADCs
(2019-01-01)
Wu, Kun-Chih
;
Wu, Meng-Shuan
;
Hong, Hao-Chiao
;
電控工程研究所
;
Institute of Electrical and Control Engineering
A digital background calibration scheme for calibrating the linear, third-order, and fifth-order nonlinear gain errors of the residue amplifiers (RAs) in pipelined ADCs is proposed. By alternating injecting three pseudo-random binary sequences (PRBS) with designated weights to the RA through the sub-DAC, multiple correlations of the nonlinearity-corrected backend ADC's outputs and the injected PRBS signals are computed by digital circuits to estimate the calibration parameters according to the proposed multiple correlation estimation (MCE) method. Three least-mean-square (LMS) loops are used to acquire and track the optimal values of the calibration parameters in background so as to vanish all the errors in the ADC's output. Simulation results of a 14-bit pipelined ADC show the proposed calibration scheme improves the SNDR of the ADC from 31.2 dB to 80.4 dB. The proposed calibration scheme relaxes the design requirements of the RAs, making it well suit the design in advanced technology.