Browsing by Author "Wu, Tsung-Han"

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A comprehensive study on the oxidation of 4H-SiC in diluted N2O ambient
(2017-04-01)
Tseng, Yuan-Hung
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Wu, Tsung-Han
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Tsui, Bing-Yue
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Yen, Cheng-Tyng
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Hung, Chien-Chung
The oxidation mechanism of 4H-SiC in diluted N2O ambient was studied at various temperatures, N2O flow rates, and N-2/N2O flow ratios. The collision partner, N-2 in this study, plays crucial roles in determining the oxidation rate and N-incorporation. According to the proposed oxidation mechanism, lowering the interface state density at lower oxidation temperatures is possible with a high-efficiency collision partner. (C) 2017 The Japan Society of Applied Physics
A comprehensive study on the oxidation of 4H-SiC in diluted N2O ambient
(2017-04)
Tseng, Yuan-Hung
;
Wu, Tsung-Han
;
Tsui, Bing-Yue
;
Yen, Cheng-Tyng
;
Hung, Chien-Chung
The oxidation mechanism of 4H-SiC in diluted N2O ambient was studied at various temperatures, N2O flow rates, and N-2/N2O flow ratios. The collision partner, N-2 in this study, plays crucial roles in determining the oxidation rate and N-incorporation. According to the proposed oxidation mechanism, lowering the interface state density at lower oxidation temperatures is possible with a high-efficiency collision partner. (C) 2017 The Japan Society of Applied Physics
An Intelligent Elevator Development and Management System
(2020-06-01)
Van, Lan-Da
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Lin, Yi-Bing
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Wu, Tsung-Han
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Lin, Yu-Chi
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資訊工程學系
This paper proposes ElevatorTalk, an elevator development and management system based on the Internet of Things (IoT) approach called IoTtalk. This system modularizes the software into elevator components so that we can develop flexible and scalable car scheduling algorithms. ElevatorTalk consists of three subsystems: cars, scheduler, and the elevator car operating (ECO) panel. The first two subsystems are used to develop the elevator systems, and the third subsystem is used to receive requests issued by the passengers. These three subsystems work in parallel, and communicate with each other through sending and receiving messages. ElevatorTalk can connect to a real elevator system to serve as the elevator management center. It can also emulate the existing elevator systems with different car scheduling algorithms. We propose an intelligent aggressive car scheduling with initial car distribution (ACSICD) algorithm in ElevatorTalk. Our paper indicates that ACSICD has better waiting/travel/journey time performance and/or accuracy than the previous proposed algorithms. We also show that in our approach, the car scheduling decision can be quickly made with 0.2010 ms, and therefore good performance in the time complexity is achieved.
Biomechanical investigation into the structural design of porous additive manufactured cages using numerical and experimental approaches
(2016-09-01)
Tsai, Pei-I
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Hsu, Ching-Chi
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Chen, San-Yuan
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Wu, Tsung-Han
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Huang, Chih-Chieh
Traditional solid cages have been widely used in posterior lumbar interbody fusion (PLIF) surgery. However, solid cages significantly affect the loading mechanism of the human spine due to their extremely high structural stiffness. Previous studies proposed and investigated porous additive manufactured (AM) cages; however, their biomechanical performances were analyzed using oversimplified bone-implant numerical models. Thus, the aim of this study was to investigate the outer shape and inner porous structure of the AM cages. The outer shape of the AM cages was discovered using a simulation based genetic algorithm; their inner porous structure was subsequently analyzed parametrically using T10-S1 multilevel spine models. Finally, six types of the AM cages, which were manufactured using selective laser melting, were tested to validate the numerical outcomes. The subsidence resistance of the optimum design was superior to the conventional cage designs. A porous AM cage with a pillar diameter of 0.4 mm, a pillar angle of 40 degrees, and a porosity of between 69% and 80% revealed better biomechanical performances. Both the numerical and experimental outcomes can help surgeons to understand the biomechanics of PLIF surgery combined with the use of AM cages. (C) 2016 Elsevier Ltd. All rights reserved.
Green Elevator Scheduling Based on IoT Communications
(2020-01-01)
Van, Lan-Da
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Lin, Yi-Bing
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Wu, Tsung-Han
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Chao, Tzu-Hsiang
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資訊工程學系
In this paper, we propose an energy-saving elevator scheduling algorithm to reduce the car moving steps to achieve motor energy saving and green wireless communications. The proposed algorithm consisting of six procedures can attain fewer Internet of Things (IoT) message exchanges (i.e. communication transmissions) between the Scheduler subsystem and the Car subsystem via the core function AssignCar(r). The function AssignCar(r) is capable of assigning a request to the nearest car through car search globally. From the emulation results for four cars, this work shows that the proposed algorithm outperforms the previous work named as aggressive car scheduling with initial car distribution (ACSICD) algorithm with energy consumption reductions by 49.43%, 47.68%, 37.89%, and 47.65% for up-peak, inter-floor, downpeak, and all-day request patterns, respectively.
JAIP-MP: A Four-Core Java Application Processor
(2015)
Tsai, Chun-Jen
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Wu, Tsung-Han
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Su, Hung-Cheng
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資訊工程學系
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Department of Computer Science
In this paper, we present the design of a four-core Java application processor, JAIP-MP. Each processor core in JAIP-MP is a hardwired Java core that supports dynamic class loading, two-fold bytecode execution, object-oriented dynamic resolution, method and object caching, Java exception handling, and temporal multithreading. For JAIP-MP, a global load-balancing task manager is used to evenly distribute Java threads among the local task queues of every processor cores. In addition, a data coherence controller is designed to enforce coherence across all data caches and to perform synchronization operations among Java threads of all processor cores. Since thread management and synchronization mechanisms are completely implemented in hardware, the single-core multi-tasking performance of JAIP-MP is much higher than that of a software-based VM running on a traditional OS kernel such as Linux. For execution of multithreading applications, the speedup of a four-core JAIP-MP system can be up to 3.69 times faster than a single-core JAIP system, tested using the JemBench parallel benchmark programs.
JAIP-MP: A Four-Core Java Application Processor for Embedded Systems
(2016)
Tsai, Chun-Jen
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Wu, Tsung-Han
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Su, Hung-Cheng
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Chen, Cheng-Yang
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資訊工程學系
In this chapter, we present a four-core Java application processor, JAIP-MP. In addition to supporting multi-core coherent data accesses to shared memory, each processor core in JAIP-MP is a hardwired Java core that is capable of dynamic class loading, two-fold bytecode execution, object-oriented dynamic resolution, method/object caching, Java exception handling, preemptive multi-threading, and memory management. Most of the essential OS kernel functions are implemented in hardware. In particular, the preemptive multi-threading performance is much higher than that of a software-based VM running on a traditional OS kernel such as Linux. Currently, single-cycle context switching with a time quantum as small as 20 mu s can be achieved by each core. More importantly, the Java language model itself makes it possible to maintain binary portability of application software regardless of the hardwired OS kernel component. In summary, JAIP-MP could be used to study the potential benefits of OS kernel implementation in hardware.
PlantTalk: A Smartphone-Based Intelligent Hydroponic Plant Box
(2019-04-02)
Van, Lan-Da
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Lin, Yi-Bing
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Wu, Tsung-Han
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Lin, Yun-Wei
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Peng, Syuan-Ru
This paper proposes an IoT-based intelligent hydroponic plant factory solution called PlantTalk. The novelty of our approach is that the PlantTalk intelligence can be built through an arbitrary smartphone. We show that PlantTalk can flexibly configure the connections of various plant sensors and actuators through a smartphone. One can also conveniently write Python programs for plant-care intelligence through the smart phone. The developed plant-care intelligence includes automatic LED lighting, water spray, water pump and so on. As an example, we show that the PlantTalk intelligence effectively lowers the CO2 concentration, and the reduction speed is 53% faster than a traditional plant system. PlantTalk has been extended for a plant factory called AgriTalk.
Pre-Chirped Pulse Excitation Enhanced Terahertz Radiation
(2016-03)
Lee, Chao-Kuei
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Lin, Yuan-Yao
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Lin, Gong-Ru
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Wu, Chung-Lun
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Wu, Tsung-Han
The enhanced broadband THz radiation excited by pre-chirping the femtosecond pumping laser pulse is explored from a photoconductive antenna made by the low-temperature molecular-beam-epitaxy (LT-MBE) grown Gallium Arsenide (GaAs). Nearly 3-dB enlargement on peak amplitude of THz radiation accompanied with broadened bandwidth is achieved with positively chirped pulse excitation. The laser with short pulsewidth assists the broadening of THz bandwidth, whereas the peak intensity of THz relies strictly on lengthened carrier lifetime. The enhancement of high-frequency radiation components at low pumping intensity also indicates the nature of power dependence in such a coherently controlled process. When photocurrent saturation occurs in the LT-MBE-grown GaAs under high-power pumping condition, the clipping effect on peak amplitude of current pulse lengthens the duration of current surge effect. Both the peak intensity and the frequency spectrum of the generated THz pulse concurrently declines. The physical mechanism related to pre-chirped pulse excitation dependent carrier dynamics is proposed to elucidate the spectral response as well as the power dependence in such a coherently controlled THz radiation process.
Robust unipolar resistive switching of Co nano-dots embedded ZrO(2) thin film memories and their switching mechanism
(2012-01-01)
Wu, Ming-Chi
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Wu, Tsung-Han
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Tseng, Tseung-Yuen
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
The preparation and electrical properties of Ti/Co Embedded (Co-E) ZrO(2)/Pt resistive switching memories are investigated. The Co nano-dots are formed in ZrO(2) thin film after the memory device is annealed at 600 degrees C in N(2) ambient for 60 s without any chemical reaction between Co and ZrO(2), which is confirmed from the transmission electron microscopy, energy dispersive X-ray analyzer, and X-ray photoelectron spectroscopy observations. The devices exhibit low forming voltage of 1.5 similar to 2.8V and robust negative bias unipolar resistive switching behaviors with small negative set voltage of -1.1 similar to-1.6 V. A physical model based on a filament mechanism is employed to explain the switching behaviors. It has a high potential for ultra high density nonvolatile memory applications. (C) 2012 American Institute of Physics. [doi: 10.1063/1.3674322]
Robust unipolar resistive switching of Co nano-dots embedded ZrO2 thin film memories and their switching mechanism
(2012-01-01)
Wu, Ming-Chi
;
Wu, Tsung-Han
;
Tseng, Tseung-Yuen
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The preparation and electrical properties of Ti/Co Embedded (Co-E) ZrO2/Pt resistive switching memories are investigated. The Co nano-dots are formed in ZrO2 thin film after the memory device is annealed at 600 degrees C in N-2 ambient for 60 s without any chemical reaction between Co and ZrO2, which is confirmed from the transmission electron microscopy, energy dispersive X-ray analyzer, and X-ray photoelectron spectroscopy observations. The devices exhibit low forming voltage of 1.5 similar to 2.8V and robust negative bias unipolar resistive switching behaviors with small negative set voltage of -1.1 similar to-1.6 V. A physical model based on a filament mechanism is employed to explain the switching behaviors. It has a high potential for ultra high density nonvolatile memory applications. (C) 2012 American Institute of Physics. [doi: 10.1063/1.3674322]
Temporal Multithreading Architecture Design for a Java Processor
(2014-01-01)
Su, Hung-Cheng
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Wu, Tsung-Han
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Tsai, Chun-Jen
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資訊工程學系
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Department of Computer Science
In this paper, we presents the design of a hardware temporal multi-threading architecture for a Java processor. The Java virtual machine (JVM) model is a stack machine where the process state is the snapshot of the Java stack If the runtime stack is stored (or cached) in on-chip memory for performance reasons, the backup and restoration of the Java runtime stacks for context switching would be expensive operations. We propose a Ping-Pong buffer architecture in this paper to facilitate fully hardware-based multi-threading capability for a Java processor. The proposed hardware architecture has been implemented and verified on an FPGA platform, Xilinx ML605. The experimental results show that the proposed context-switching efficiency is much higher than that of a software-based VM such as the CVM-JIT. Therefore, the proposed hardwired Java processor is promising for embedded applications that require heavy multi-threading operations.