Browsing by Author "Xu, Yong"

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Ambipolar MoTe2 Transistors and Their Applications in Logic Circuits
(2014-05-28)
Lin, Yen-Fu
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Xu, Yong
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Wang, Sheng-Tsung
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Li, Song-Lin
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Yamamoto, Mahito
We report ambipolar charge transport in a-molybdenum ditelluride (MoTe2) flakes, whereby the temperature dependence of the electrical characteristics was systematically analyzed. The ambipolarity of the charge transport originated from the formation of Schottky barriers at the metal/MoTe2 contacts. The Schottky barrier heights as well as the current on/off ratio could be modified by modulating the electrostatic fields of the back-gate voltage (V-bg) and drain-source voltage (V-ds). Using these ambipolar MoTe2 transistors we fabricated complementary inverters and amplifiers, demonstrating their feasibility for future digital and analog circuit applications.
Atomically thin van der Waals tunnel field-effect transistors and its potential for applications
(2019-03-08)
Yang, Shih-Hsien
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Yao, You-Teng
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Xu, Yong
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Lin, Che-Yi
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Chang, Yuan-Ming
Power dissipation is a crucial problem as the packing density of transistors increases in modern integrated circuits. Tunnel field-effect transistors (TFETs), which have high energy filtering provided by band-to-band tunneling (BTBT), have been proposed as an alternative electronics architecture to decrease the energy loss in bias operation and to achieve steep switching at room temperature. Very recently, the BTBT behavior has been demonstrated in van der Waals heterostructures by using unintentionally doped semiconductors. The reason of the BTBT formation is attributed to a significant band bending near the heterointerface, resulting in carrier accumulations. In this work, to investigate charge transport in type-III transistors, we adopted the same band-bending concept to fabricate van der Waals BP/MoS2 heterostructures. Through analyzing the temperature dependence of their electrical properties, we carefully ruled out the contribution of metal-semiconductor contact resistances and improved our understanding of carrier injection in 2D type-III transistors. The BP/MoS2 heterostructures showed both negative differential resistance and 1/f(2) current fluctuations, strongly demonstrating the BTBT operation. Finally, we also designed a TFET based on this heterostructure with an ionic liquid gate, and this TFET demonstrated an subthreshold slope can successfully surmount the thermal limit of 60 mV/decade. This work improves our understanding of charge transport in such layered heterostructures and helps to improve the energy efficiency of next-generation nanoscale electronics.
Negative-Differential-Resistance Devices Achieved by Band-Structure Engineering in Silicene under Periodic Potentials
(2018-10-18)
Chen, Chang-Hung
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Li, Wen-Wu
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Chang, Yuan-Ming
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Lin, Che-Yi
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Yang, Shih-Hsien
An important development in modern electronics is the realization of band-structure engineering for the design of novel materials and devices. One possible way to realize band-structure engineering is by addition of periodic potentials to two-dimensional (2D) materials, such as graphene, to form a superstructure, known as a "superlattice.' Unlike the band gap of graphene, the band gap of silicene can be tuned by an out-of-plane electric field owing to its unusual buckled structure. In this work, we use the designable band gap of silicene and the band structure of superlattices, together with the spin and valley degrees of freedom, to propose a design principle for optimizing the performance of spin-and valley-dependent negative-differential-resistance (NDR) devices using silicene superlattices. On the basis of the effective Hamiltonian formalism, we predict that the peak-to-valley current ratio could be larger than most recently reported results achieved by 2D materials, suggesting that the silicene superlattice is a good candidate for realizing NDR devices. The design principle proposed in this work could also be extended to other layered materials with tunable band gaps. This could pave the way for advanced material and device designs based on band-gap engineering of 2D materials.
The impact of electrical contacts and contact-induced ultralow noise amplitudes in layered transistors
(2016-12)
Hsu, Chih-Kai
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Lin, Chi-Yi
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Li, Wenwu
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Sun, Huabin
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Xu, Yong
Electrical contacts made of conducting channels with external circuitry significantly impact electronic performances, in particular for two-dimensional semiconductors. This work presents a systematic study of back-to-back Schottky contacts to a layered compound of semiconducting flakes through static and dynamic electrical measurements and the first demonstration of Schottky barrier-dominated, p-type PbSnS2 field-effect transistors. In the static analysis, the Schottky barrier height of the layered transistors can be modulated by applied electrostatic fields, while the contact-dominated fluctuations render to the 1/f electric noise and induce a normalized noise amplitude in the order of 10(-9)-10(-8). Such an ultralow-noise amplitude, which is never observed in other layered semiconducting transistors, is ascribed to the existence of Schottky barriers. Our experimental results provide a nuanced perspective for advancing the understanding of performance limit with increasing numbers of layers for electronic development.