Browsing by Author "Yan, ST"
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Item type:Item, A distributed charge storage with GeO2 nanodots(2004-04-05) ;Chang, TC ;Yan, ST ;Hsu, CH ;Tang, MTLee, JFIn this study, a distributed charge storage with GeO2 nanodots is demonstrated. The mean size and aerial density of the nanodots embedded in SiO2 are estimated to be about 5.5 nm and 4.3x10(11) cm(-2), respectively. The composition of the dots is also confirmed to be GeO2 by x-ray absorption near-edge structure analyses. A significant memory effect is observed through the electrical measurements. Under the low voltage operation of 5 V, the memory window is estimated to similar to0.45 V. Also, a physical model is proposed to demonstrate the charge storage effect through the interfacial traps of GeO2 nanodots. (C) 2004 American Institute of Physics.Item type:Item, A method for fabricating a superior oxide/nitride/oxide gate stack(2004) ;Chang, TC ;Yan, ST ;Liu, PT ;Wang, MCSze, SMA superior oxide/nitride/oxide (ONO) gate stack was demonstrated. High density plasma chemical vapor deposition was used to deposit the silicon nitride layer instead of the conventional low-pressure chemical vapor deposition for silicon/oxide/nitride/oxide/silicon technology. The densified nitride layer was performed by high-temperature dry oxidation to form a thermally grown blocking oxide layer on the silicon nitride rather than a deposited oxide layer. The ONO gate stack shows large memory window, high breakdown voltage, and reliable endurance characteristics, which is a potential candidate for future nonvolatile memory technology. (C) 2004 The Electrochemical Society.Item type:Item, A novel approach of fabricating germanium nanocrystals for nonvolatile memory application(2004-01-01) ;Chang, TC ;Yan, ST ;Liu, PT ;Chen, CWLin, SHA nonvolatile memory device embedded with Ge nanocrystal dots is fabricated by the thermal oxidation of Si0.8Ge0.2 combined with a rapid thermal annealing at 950degreesC in N-2 gas. The tunnel oxide in the nonvolatile memory is controlled to be 4.5 nm thick and embedded with 5.5 nm Ge nanocrystals. A low operating voltage, 5 V, is implemented and a significant threshold-voltage shift, 0.42 V, is observed. When the electrons are trapped in the Ge nanocrystals, the effect of Coulomb blockade prevents the injection and storage of more electrons and decreases the leakage current. Also, the retention characteristics are tested to be robust. (C) 2003 The Electrochemical Society.Item type:Item, A novel distributed charge storage element fabricated by the oxidation of amorphous silicon carbide(2004) ;Chang, TC ;Yan, ST ;Chen, YT ;Liu, PTSze, SMA novel distributed charge storage element fabricated by the oxidation of amorphous silicon carbide is proposed. For low-temperature oxidation processes, the oxidized SiCO gate stack shows a larger memory window due to the retainable dangling bonds with more Si-C bonding types and less Si-O bonds. Under 5 V write operation of the low-temperature oxidized SiCO stack, a 1.5 V threshold voltage shift is exhibited, which is sufficient for a memory device to define "0'' and "1.'' Also, the low-temperature oxidation process of the SiCO layer saves the thermal budget for the manufacturing processes of nonvolatile memory devices. (C) 2004 The Electrochemical Society.Item type:Item, CMP of low-k methylsilsesquiazane with oxygen plasma treatment for multilevel interconnect applications(2004) ;Chang, TC ;Tsai, TM ;Liu, PT ;Chen, CWYan, STThe effect of oxygen plasma treatment on methylsilsesquiazane (MSZ) dielectric was investigated for chemical mechanical planarization (CMP) process. Oxygen plasma treatment was implemented before CMP. Experimental results have shown that the polishing rate of MSZ film with O-2 plasma pretreatment is increased as much as two order of magnitude more than that of MSZ without O-2 plasma pretreatment. Moreover, the electrical properties of post-CMP MSZ are close to those of an as-cured MSZ. These results indicate that the modified surfaces resulting from O-2 plasma treatment increase the polishing rate of MSZ. After polishing, the MSZ film still maintains a low-k quality. (C) 2004 The Electrochemical Society.Item type:Item, CMP of ultra low-k material porous-polysilazane (PPSZ) for interconnect applications(2004-01-30) ;Chang, TC ;Tsai, TM ;Liu, PT ;Chen, CWYan, STIn this article, we investigated the impact of chemical mechanical polishing (CMP) on an ultra low dielectric constant (ultra low-k) material Porous-Polysilazane (PPSZ) with slurries of metal polishing during interconnect manufacture process. Since the CMP processing of metals such as TaN and Cu are inevitable steps for interconnect fabrication, we have utilized two types of slurries (marked as TaN and Cu slurries) to evaluate their effects on the dielectric properties of PPSZ films. Electrical and material analyses have shown surface planarity and dielectric properties of PPSZ films will not be degraded during these metal CMP processes. This indicates that the ultra low-k PPSZ films are promising for inter-level dielectric (ILD) applications in ultra large-scale integrated circuits (ULSI) technology. (C) 2003 Elsevier B.V. All rights reserved.Item type:Item, Effective repair to ultra-low-k dielectric material (k-2.0) by hexamethyidisilazane treatment(2002-07-01) ;Mor, YS ;Chang, TC ;Liu, PT ;Tsai, TMChen, CWO-2 plasma ashing is commonly used to remove photoresist. The effect of O-2 plasma ashing on the porous organosilicate glass (CH3SiO1.5)(n), one of the spin-on materials, is investigated. O2 plasma can oxidize the methyl groups in porous organosilicate glass (POSG), which leads to the formation of Si-OH groups. The hydrophilic Si-OH groups will induce moisture uptake so that electrical degradation will occur in POSG film. Pure hexamethyldisilazane (HMDS) vapor (100% HMDS) can react with the Si-OH groups in POSG film. It converts hydrophilic Si-OH groups into hydrophobic Si-O-Si(CH3)(3) groups against moisture uptake. The leakage current density decreases by a factor of 2-3 and the dielectric constant decreases from 3.62 to 2.4 when O-2 plasma-damaged POSG undergoes HMDS treatment at 80degreesC for 15 min. Therefore, HMDS treatment is the effective technique to repair the electrical degradation to POSG film during photoresist stripping processing. (C) 2002 American Vacuum Society.Item type:Item, Electrical transport phenomena in aromatic hydrocarbon polymer(2003-02-01) ;Liu, PT ;Chang, TC ;Yan, ST ;Li, CHSze, SMElectrical transport mechanisms in a low-permittivity aromatic hydrocarbon SiLK have been characterized using metal/SiLK/Si capacitors under both thermal and electric field stressing. Two distinct transport mechanisms dominate the leakage behavior of the polymer SiLK with Al and Cu electrodes, respectively. Al-electrode capacitors show Schottky-emission (SE)-type leakage behavior while Poole-Frenkel (PF) conduction resulted from trap generation in the SiLK polymer is responsible for the leakage of Cu-electrode capacitors. The trap barrier height has been extracted from the temperature dependence of leakage current. Copper penetration into the SiLK polymer leads to the generation of trap centers and seriously deteriorates dielectric characteristics. The transition of leakage conduction from SE to PF will exponentially lead to the insulating failure of the SiLK polymer. (C) 2003 The Electrochemical Society.Item type:Item, Electron charging and discharging effects of tungsten nanocrystals embedded in silicon dioxide for low-voltage nonvolatile memory technology(2005) ;Chang, TC ;Liu, PT ;Yan, ST ;Sze, SM電子工程學系及電子研究所Spherical and well-separated tungsten nanocrystals embedded in the SiO2 layer are demonstrated for the low-voltage nonvolatile memory device. The tungsten dots are formed, based on the thermal oxidation of the tungsten silicide, with a mean size and aerial density of 4.5 nm and 3.7 x 10(11)/ cm(2), respectively. A pronounced capacitance-voltage hysteresis is observed with a memory window of 0.95 V under the 3 V programming voltage. Also, the endurance of the memory device is not degraded up to 106 write/erase cycles. (C) 2005 The Electrochemical Society.Item type:Item, Extraction of electrical mechanisms of low-dielectric constant material MSZ for interconnect applications(2004-01-30) ;Chang, TC ;Yan, ST ;Liu, R ;Lin, ZWAoki, HIn this paper, electrical characterization of low-k dielectric methyl-silsesquiazane (MSZ) is presented. Thermal stress and bias temperature stress (BTS) were utilized to evaluate the impact of Cu penetration on dielectric properties. In the investigation of thermal stress performed by furnace annealing, the leakage mechanism of Al- and Cu-gate MIS capacitors is competed by the decrease of the interfacial states between metal and dielectric and the increase of defects resulted from Cu penetration. Also, the leakage conduction mechanism at high electric field is deduced from Schottky emission in conjunction with space-charge-limited current conduction (SCLC) through BTS methods. (C) 2003 Elsevier B.V. All rights reserved.Item type:Item, Extraction of electrical mechanisms of low-dielectric constant material MSZ for interconnect applications (Vol 447, pg 516, 2004)(2004-11-22) ;Chang, TC ;Yan, ST ;Liu, PT ;Lin, ZWAoki, HItem type:Item, Leakage behavior of the quasi-superlattice stack for multilevel charge storage(2004-05-03) ;Chang, TC ;Yan, ST ;Liu, PT ;Chen, CWWu, HHThe leakage behavior of the quasi-superlattice structure has been characterized by current-voltage measurements at room temperature and 50 K. A resonant tunnelinglike leakage characteristic is observed at low temperature. The resonant tunneling occurs at around 2, 5.2, and 7 V under a gate voltage swept from 0 to 10 V. A concise physical model is proposed to characterize the leakage mechanism of tunneling for the quasi-lattice structure and suggests that the considerations of the operating voltage for the two-bit per cell nonvolatile-memory device need to be taken into account. (C) 2004 American Institute of Physics.Item type:Item, Memory effect of oxide/oxygen-incorporated silicon carbide/oxide sandwiched structure(2005) ;Chang, TC ;Liu, PT ;Yan, ST ;Yang, FMSze, SMThe memory effects of the oxide/oxygen-incorporated silicon carbide (SiC :O)/oxide sandwiched structure were investigated. The memory window is decreased with the increasing of the oxygen content in the SiC :O film due to the reduction of dangling bonds. A concise model is proposed to explain the reduction of dangling bonds with increasing oxygen content. Also, a higher breakdown voltage is observed with less oxygen content in the SiC :O film, which is attributed to the high barrier height induced by electron trapping in the SiC :O film. (C) 2005 The Electrochemical Society.Item type:Item, Memory effect of oxide/SiC : O/oxide sandwiched structures(2004-03-22) ;Chang, TC ;Yan, ST ;Yang, FM ;Liu, PTSze, SMThe memory effects of the oxide/oxygen-incorporated silicon carbide (SiC:O)/oxide sandwiched structure were investigated. The memory window is decreased with the increase of the oxygen content in the SiC:O film due to the reduction of dangling bonds. A concise model is proposed to explain the reduction of dangling bonds with increasing oxygen content. Also, a higher breakdown voltage is observed with less oxygen content in the SiC:O film, which is attributed to the high barrier height induced by electron trapping in the SiC:O film. (C) 2004 American Institute of Physics.Item type:Item, Memory effect of oxide/SiC : O/oxide sandwiched structures" (vol 84, pg 2094, 2004)(2004-06-07) ;Chang, TC ;Yan, ST ;Yang, FM ;Liu, PTSze, SMItem type:Item, Method to improve chemical-mechanical-planarization polishing rate of low-k methyl-silsesquiazane for ultralarge scale integrated interconnect application(2004-05-01) ;Chang, TC ;Tsai, TM ;Liu, PT ;Yan, STChang, YCIn this work, characteristics of low-k methyl-silsesquiazane (MSZ) for the chemical-mechanical-planarization (CMP) process using oxygen plasma pretreatment were investigated in detail. The low-dielectric-constant (low-k) MSZ was prepared by a spin-on deposition process. The resultant wafers were followed by an oxygen (O-2) plasma treatment. After oxygen plasma treatment, the CMP process was implemented. Electrical and material analyses were utilized to explore the characteristics of post-CMP MSZ. Experimental results showed that the polish rate. of MSZ film with O-2 plasma pretreatment was increased as much as two times in magnitude, as compared to that of the MSZ without O-2 plasma pretreatment. In addition, the post-CMP MSZ exhibited superior electrical properties. These results clearly indicated that the modification surfaces that resulted from O-2-plasma treatment facilitated CMP MSZ. After CMP polishing, the MSZ film still maintained low-k quality. (C) 2004 American Vacuum Society.Item type:Item, Moisture-induced material instability of porous organosilicate glass(2003-04-01) ;Chang, TC ;Chen, CW ;Liu, PT ;Mor, YSTsai, HMThe mechanism of leakage current of porous organosilicate glass (POSG) with O-2 plasma ashing is investigated. The O-2 plasma ashing often deteriorates the POSG film, causing moisture uptake. We find that the leakage-current mechanism of POSG transforms from Schottky emission into ionic conduction after O-2 plasma treatment. The mobile ions (H+,OH-) supported by absorbing moisture move easily when an external electric field is applied to POSG film, which leads to the ionic conduction leakage current across the moisture-absorbing POSG film. Hence, the leakage current density is drastically increased about four to five orders of magnitude compared with untreated POSG film. (C) 2003 The Electrochemical Society.Item type:Item, Quasi-superlattice storage - A concept of multilevel charge storage(2004) ;Chang, TC ;Yan, ST ;Liu, PT ;Chen, CWWu, HHthis work, a novel concept of quasi-superlattice storage (QS(2)) is demonstrated. Under a suitable operating voltage, two apparent states of charge storage can be distinguished. The memory effects are due to the multilevel charge storage within the quasi-superlattice. The multilevel charge storage provides a feasible design for the 2-bit-per-cell nonvolatile memory devices. Also, the leakage behavior of the quasi-superlattice structure has also been characterized by current-voltage measurements at room temperature and low temperatures. The resonant tunneling-like leakage characteristic is observed at low temperatures. A concise physical model is proposed to characterize the leakage mechanism of tunneling for the quasi-superlattice structure, and this suggests that consideration of the operating voltage for the 2-bit-per-cell nonvolatile memory device needs to be taken into account. (C) 2004 The Electrochemical Society.Item type:Item, Quasisuperlattice storage: A concept of multilevel charge storage(2004-07-12) ;Chang, TC ;Yan, ST ;Liu, PT ;Chen, CWWu, HHA concept of the quasisuperlattice storage has been demonstrated in this study. Under suitably operated voltage, two apparent states of charge storage can be distinguished. The memory effects are due to the multilevel storage in the quasisuperlattice. Also, the a-Si quantum wells provide a feasible design for the 2 bit per cell nonvolatile memory devices. The operation of the 2 bit per cell needs to be performed by Fowler-Nordheim tunneling instead of conventional channel hot electron injection. Additionally, the dual read operation of the source and drain sides for conventional SONOS 2 bit/cell device is not necessary, which simplifies the circuit design engineering. (C) 2004 American Institute of Physics.Item type:Item, Study on SONOS nonvolatile memory technology using high-density plasma CVD silicon nitride(2004) ;Chang, TC ;Yan, ST ;Liu, PT ;Chen, CWWu, YCWith the replacement of silicon nitride in an oxide/nitride/oxide (ONO) gate-stacked structure, trap-rich high-density plasma chemical vapor deposited (HDPCVD) SiNx shows a more significant threshold-voltage shift (memory window) than that of conventional low pressure (LP)CVD Si3N4. Also, low-temperature (2000degreesC) deposited HDPCVD silicon nitride shows a good retention characteristic, the same as high-temperature (780degreesC) LPCVD Si3N4. With the optimization of thickness in the gate-stacked ONO structure, low-voltage and reliable operation, lower than 5 V, is realizable. (C) 2004 The Electrochemical Society.