Browsing by Author "Yang, Chih-Wen"

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A 1.31Gb/s, 96.6% Utilization Stochastic Nonbinary LDPC Decoder for Small Cell Applications
(2015)
Lee, Xin-Ru
;
Yang, Chih-Wen
;
Chen, Chih-Lung
;
Chang, Hsie-Chia
;
Lee, Chen-Yi
In this paper, an over Gb/s stochastic nonbinary LDPC (NB-LDPC) decoder chip is first-reported. The operation of proposed decoder is transformed to logarithm domain, so that the decoding complexity is mitigated by the simpler summations and fewer bit-width. In addition, the storage requirements are dramatically reduced by truncated TFM architecture. After, benefited from architecture optimizations and symbol-serial property, the routing capability of proposed decoder is extraordinarily enhanced. According to the measurement results, this decoder can deliver 1.31Gb/s throughput under 368MHz clock frequency with the corresponding energy-efficiency of 0.45nJ/bit. Compared to other NB-LDPC decoders, our stochastic NB-LDPC decoder with 96.6% chip utilization improves 2x area-efficiency and 7x energy-efficiency.
An Area-Efficient Relaxed Half-Stochastic Decoding Architecture for Nonbinary LDPC Codes
(2015-03-01)
Lee, Xin-Ru
;
Yang, Chih-Wen
;
Chen, Chih-Lung
;
Chang, Hsie-Chia
;
Lee, Chen-Yi
This brief presents an area-efficient relaxed halfstochastic nonbinary low-density parity-check (NB-LDPC) decoder. A novel decoding algorithm, namely, cumulative tracking forecast memory with concealing channel values (CTFM-CC) is proposed to reduce algorithm complexity and maintain bit-errorrate performance as well. Furthermore, the hardware complexity of variable node units (VNUs) is reduced through a truncated architecture, which only keeps the most reliable n probability density functions. To deal with the sum-product-algorithm-to-stochastic conversion of VNU, a dynamic random number generation method, which is used for sampling a stochastic symbol, is also proposed. With these features, a (168, 84) regular-(2,4) NB-LDPC code over GF(16) decoder is implemented in a 90-nm process. According to the results of postlayout simulation, this decoder can deliver a throughput of 1.13 Gb/s with a hardware efficiency of 0.90 Mb/s/K-gate at 286 MHz. Compared to related rate-1/2 NB-LDPC decoders, the proposed decoder achieves the highest hardware efficiency with similar error-correcting capability.
Area-efficient TFM-based Stochastic Decoder Design for Non-binary LDPC Codes
(2014-01-01)
Yang, Chih-Wen
;
Lee, Xin-Ru
;
Chen, Chih-Lung
;
Chang, Hsie-Chia
;
Lee, Chen-Yi
This paper presents a non-binary LDPC decoder based on stochastic arithmetic. Although the previous stochastic works reduce the complexity of check node by transforming the convolution of the SPA algorithm to the finite field summation, the stochastic decoder still has a implementation bottleneck due to large storage introduced by the variable node process. Considering a balance between algorithm level and implementation level, we propose a shortened TFM architecture as well as its updating criterion. A compare-and-alter counter architecture is also proposed to avoid sorting among counters which decide the decoded codeword. With these features, the proposed (136, 68) fully-parallel stochastic NB-LDPC decoder over GF(32) implemented in UMC 90-nm can achieve 120 Mb/s throughput while operating under 455 MHz with 740 k gate counts which are only 10 % of the original TFM decoder.
Janus monolayers of transition metal dichalcogenides
(2017-08-01)
Lu, Ang-Yu
;
Zhu, Hanyu
;
Xiao, Jun
;
Chuu, Chih-Piao
;
Han, Yimo
Structural symmetry-breaking plays a crucial role in determining the electronic band structures of two-dimensional materials. Tremendous efforts have been devoted to breaking the in-plane symmetry of graphene with electric fields on AB-stacked bilayers(1,2) or stacked van der Waals heterostructures(3,4). In contrast, transition metal dichalcogenide monolayers are semiconductors with intrinsic in-plane asymmetry, leading to direct electronic bandgaps, distinctive optical properties and great potential in optoelectronics(5,6). Apart from their in-plane inversion asymmetry, an additional degree of freedom allowing spin manipulation can be induced by breaking the out-of-plane mirror symmetry with external electric fields(7,8) or, as theoretically proposed, with an asymmetric out-of-plane structural configuration(9). Here, we report a synthetic strategy to grow Janus monolayers of transition metal dichalcogenides breaking the out-of-plane structural symmetry. In particular, based on a MoS2 monolayer, we fully replace the top-layer S with Se atoms. We confirm the Janus structure of MoSSe directly by means of scanning transmission electron microscopy and energy-dependent X-ray photoelectron spectroscopy, and prove the existence of vertical dipoles by second harmonic generation and piezoresponse force microscopy measurements.