Browsing by Author "Yang, Chih-Yi"
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Item type:Item, High Performance Normally-Off AlGaN/GaN MIS-HEMT Using Charge Storage Technique(2019-01-01) ;Han, Ping-Cheng ;Yang, Chih-Yi ;Lee, Ming-Wen ;Wu, Jui-ShengWu, Chia-HsunItem type:Item, Investigation of Degradation Phenomena in GaN-on-Si Power MIS-HEMTs under Source Current and Drain Bias Stresses(2018-01-01) ;Yang, Chih-Yi ;Wu, Tian-Li ;Hsieh, Tin-En ;Chang, Edward Yi材料科學與工程學系In this paper, we investigate the degradation phenomena in GaN-on-Si Metal-Insulator-Semiconductor High electron Mobility Transistors (MIS-HEMTs) in the cascode topography for enhancement mode power switching applications. Different stress conditions, e.g., constant source current (Is=100(mu A)=2(mA/mm) and 100(nA)=2 x 10(-3)(mA/mm)) and drain voltages (V-D=1(V), 10(V), 100(V), and 200(V)), are used to investigate the source current and drain bias dependent degradation. First, the VTH shift is correlated with the RoN increase under a low drain bias stress (V-D<10(V)). However, under a high drain bias stress, the trapping location is most probably in the gate-to-drain access region, leading a different degradation phenomena compared to the case under a low drain bias stress. Furthermore, we found that the devices are stressed under a different source current stress show a similar degradation phenomenon. This suggests that, in the cascode circuit topology, the instability degradation is still mainly triggered by the drain bias.