Browsing by Author "Yang, HC"

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Dynamic resource allocation for VBR video transmission
(1998)
Yang, HC
;
Hang, HM
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電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The goal of this paper is to provide a feasible and flexible mechanism for variable bit rate (VBR) video transmission and to achieve high network utilization with statistical Quality of Service (QoS). In this paper, we employ a piece-wise constant rate smoothing algorithm to smooth the video coder outputs and propose a simple algorithm to determine the renegotiation schedule for the smoothed streams. In order to transmit video streams with renegotiation-based VER service, we suggest a connection admission control (CAC) based on Chernoff bound using a simple yet quite accurate "binomial" traffic model. The experimental results show that our proposed method provides an easy and robust mechanism to support real-time video transmission in both homogeneous and heterogeneous connection environments.
On multiple-voltage high-level synthesis using algorithmic transformations
(2004-12-01)
Dung, LR
;
Yang, HC
;
電控工程研究所
;
Institute of Electrical and Control Engineering
This paper presents a multiple-voltage high-level synthesis approach for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by maximization of task mobilities in that the increase of mobilities may raise the possibility of assigning tasks to low-voltage components. The mobility means the ability to schedule the starting time of a task. It is defined as the distance between its as-late-as-possible (ALAP) schedule time and its as-soon-as-possible (ASAP) schedule time. To earn task mobilities, we use loop shrinking, retiming and unfolding techniques. The loop shrinking can first reduce the iteration period bound (IPB) and, then, the others are employed for shortening the iteration period (IP) as much as possible. The minimization of IP results in high task mobilities. Finally, we can assign tasks with high mobilities to low-voltage components and, thus, minimize energy under resource and latency constraints. With considering the overhead of level conversion, our approach can achieve significant power reduction. In the case of the third-order IIR filter, the proposed approach can save up to 40.2% of power consumption.