Browsing by Author "Yang, Hui-Chin"

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iAIM: An Intelligent Autonomous Instruction Memory with Branch Handling Capability
(2008)
Yang, Hui-Chin
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Wang, Li-Ming
;
Chung, Chung-Ping
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資訊工程學系
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Department of Computer Science
Goals of this research are to reduce 1. Instruction address bus traffic, 2. Bus power, and 3. Latency, in instruction fetches in a computer system. We propose to move dynamic branch handler from the CPU side to the instruction memory side, and let it be able to autonomously access instructions for CPU CPU needs only to manage the branch handler. Key to success is that the traffic between CPU and dynamic branch handler, with only minor but innovative design changes, can be jar less than that between CPU and instruction memory. The branch handler should hence be capable of PC+4, identifying branches, and tat-get address calculation. We further suggest that even a return stack can easily be incorporated. Simulation using MiBench shows that our theory yields promising results: about 99.98% instruction address traffic and 91.87% related bus bit toggles are reduced.
Mechanism for Return Stack and Branch History Corrections under Misprediction in Deep Pipeline Design
(2008)
Chiu, Guan-Ying
;
Yang, Hui-Chin
;
Li, Walter Yuan-Hwa
;
Chung, Chung-Ping
;
資訊工程學系
Return stack may be popped due to branch misprediction, corrupting its contents. Meanwhile, erroneous branch history is also recorded for upcoming branch predictions. These errors are more likely in deep pipelines, and their handling affects performance seriously. We study these issues, and propose solutions with two virtues: low hardware overhead, and high branch prediction accuracy comparable with that of a shallow pipeline design. To deal with return stack corruption, any push and pop after any mispredicted branch should be counted and recorded. These simple rules get overly complicated when multiple unresolved branches exist, and anyone may be erroneous, as is common in deeper pipelines. Next, to deal with branch history contamination, extra history bits, plus a branch confirmation pointer are needed. The experiment result shows that our design is effective, about 4%similar to 9% performance improvement in MiBench.