Browsing by Author "Yang, Ivy"

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Hybrid Si/TMD 2D Electronic Double Channels Fabricated Using Solid CVD Few-Layer-MoS2 Stacking for V-th Matching and CMOS-Compatible 3DFETs
(2014)
Chen, Min-Cheng
;
Lin, Chia-Yi
;
Li, Kai-Hsin
;
Li, Lain-Jong
;
Chen, Chang-Hsiao
Stackable 3DFETs such as FinFET using hybrid Si/MoS 2 channels were developed using a fully CMOS-compatible process. Adding several molecular layers (3-16 layers) of the transition-metal dichalcogenide (TMD), MoS2 to Si fin and nanowire resulted in improved (+25%) I-on,I-n of the FinFET and nanowire FET (NWFET). The PFETs also operated effectively and the N/P device V-th are low and matched perfectly. The proposed heterogeneous Si/TMD 3DFETs can be useful in future electronics.
Threshold Vacuum Switch (TVS) on 3D-Stackable and 4F(2) Cross-Point Bipolar and Unipolar Resistive Random Access Memory
(2012-01-01)
Ho, ChiaHua
;
Huang, Hsin-Hau
;
Lee, Ming-Taou
;
Hsu, Cho-Lun
;
Lai, Tung-Yen
A 3D stackable and bidirectional Threshold Vacuum Switching (TVS) selector using the same WO x material as the RRAM element is reported. It provides the highest reported current density of >10(8) A/cm(2) and the highest selectivity of >10(5). Stress test at high current density indicates >10(8) cycle capability for Reset/Set operation. A mechanism based on recombination of oxygen-ions and vacancies is proposed for the observed volatile switching of TVS. Utilizing the threshold characteristics of the TVS selector, a two-step reading waveform offers potential for 3D-stackable and 4F(2) cross-point RRAM applications.
TMD FinFET with 4 nm Thin Body and Back Gate Control for Future Low Power Technology
(2015)
Chen, Min-Cheng
;
Li, Kai-Shin
;
Li, Lain-Jong
;
Lu, Ang-Yu
;
Li, Ming-Yang
A 4 nm thin transition-metal dichalcogenide (TMD) body FinFET with back gate control is proposed and demonstrated for the first time. The TMD FinFET channel is deposited by CVD. Hydrogen plasma treatment of TMD is employed to lower the series resistance for the first time. The 2 nm thin back gate oxide enables 0.5 V of Vth shift with 1.2 V change in back bias for correcting device variations and dynamically configuring a device as a high performance or low leakage device. TMD can potentially provide sub-nm thin monolayer body needed for 2 nm node FinFET.