Browsing by Author "Yang, Wen-Hau"

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93% Efficiency and 0.99 Power Factor in Pseudo-linear LED Driver
(2016-01-01)
Chiu, Shao-Wei
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Kuo, Chun-Chieh
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Chuang, Kai-Cheng
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Yang, Wen-Hau
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Chen, Ke-Horng
The proposed pseudo-linear LED driver can effectively solve the serious flicker in conventional linear LED driver (LLD). Besides, it has good electromagnetic interference (EMI) performance similar to that in conventional LLD at high AC input voltage. In the meanwhile, it has high power factor (PF) similar to boost switching regulator (SWR) LED driver at low AC input voltage. Furthermore, owing to the combination of line filter and the active full bridge rectifier, the pseudo-linear LED driver has a compact solution and high efficiency. The test chip was fabricated in 0.5 mu m 500V LDMOS process. Experimental results show 93% high efficiency, 6% total harmonic distortion (THD), and 0.99 PF at the power of 7W.
95% Light-load Efficiency Single-Inductor Dual-Output DC-DC Buck Converter with Synthesized Waveform Control Technique for USB Type-C
(2016)
Yang, Wen-Hau
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Lin, Chiun-He
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Chen, Ke-Horng
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Wey, Chin-Long
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Lin, Ying-Hsi
The proposed single-inductor dual-output (SIDO) converter can provide wide range in duty ratio control to convert input voltage 520V to dual output voltages 3.3V and 1.2V when its switching frequency is raised to 10MHz for compact size solution. The proposed synthesized waveform control (SWC) technique can emulate the inductor current without being affected by switching noise. Thus, the minimum allowable duty ratio can be lowered to 6% to meet the requirement of USB-C in one-stage low duty ratio conversion. Moreover, the switching frequency is dynamically decreased by the derived DC loading information from the SWC technique. Not only the output power MOSFET but also the main power MOSFET switch in a load-dependent switching frequency for power saving. 67% more power reduction can be obtained. 95% and 83% efficiency are achieved at light and heavy loads, respectively, when the silicon is limited within 1400 mu m*1350 mu m.
A 70W and 90% GaN-Based Class-E Wireless-Power-Transfer System with Automatic-Matching-Point-Search Control for Zero-Voltage Switching and Zero-Voltage-Derivative Switching
(2018-01-01)
Yeh, Che-Hao
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Lin, Yen-Ting
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Kuo, Chun-Chieh
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Huang, Chao-Jen
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Xie, Cheng-Yu
A 70W and 90% GaN-Based Class-E Wireless-Power-Transfer System with Automatic-Matching-Point-Search Control for Zero-Voltage Switching and Zero-Voltage-Derivative Switching
(2018-01-01)
Yeh, Che-Hao
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Lin, Yen-Ting
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Kuo, Chun-Chieh
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Huang, Chao-Jen
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Xie, Cheng-Yu
A 96%-Efficiency and 0.5%-Current-CrossRegulation Single-Inductor Multiple Floating-Output LED Driver with 24b Color Resolution
(2016)
Yang, Hsiang-An
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Yang, Wen-Hau
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Chen, Ke-Horng
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Wey, Chin-Long
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Lin, Ying-Hsi
A 99.2% Tracking Accuracy Single-Inductor Quadruple-Input-Quadruple-Output Buck-Boost Converter Topology with Periodical Interval Perturbation and Observation MPPT
(2018-01-01)
Huang, Chao-Jen
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Ma, Yao-Sheng
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Yang, Wen-Hau
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Lin, Yen-Ting
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Kuo, Chun-Chieh
this paper provides a Single-Inductor Quadruple-Input--Quadruple-Output buck-boost converter to achieve maximum tracking efficiency of 99,2% due to continuous supply in one cycle. The Maximum Power Point (MPP) tracking mode and the Harvest Energy Delivering (RED) mode harvest each energy harvesting source, deliver energy to the battery and supply it to the loading system in one cycle. Each output voltage ranges from 600mV to 2.5V and the maximum output power is up to 60mW. The peak efficiency is 91.2%.
A Constant-on-Time Control DC-DC Buck Converter With the Pseudowave Tracking Technique for Regulation Accuracy and Load Transient Enhancement
(2018-07-01)
Yang, Wen-Hau
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Huang, Chao-Jen
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Huang, Han-Hsiang
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Lin, Wei-Ting
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Chen, Ke-Horng
Constant-on-time (COT) control with an additional current feedback path in conventional buck converters can remove the need of large equivalent series resistance (ESR) at the output capacitor but it induces degraded output voltage regulation accuracy and slow transient response owing to opposite reaction between the output voltage and the additional current feedback information. Therefore, this paper proposes the pseudowave tracking (PWT) technique to reduce the load-dependent dc offset voltage of output load regulation while keeping the fast transient response similar to conventional COT buck converter with large ESR. The PWT technique further improves the transient response instantly by extending on-time and off-time periods during light-to-heavy and heavy-to-light load changes, respectively. The test chip fabricated in 28 nm CMOS process has demonstrated the improvement of offset voltage from 42 to 4 mV, while the transient response can be improved to 4 and 5 mu s with load changes from 0.3 to 1.7 A and vice versa, respectively.
A Digital Reverse Current Self-calibration Technique in 90% High Efficiency Rectified Power Supply for Near Field Communication through Magnetic Field Induction
(2017-01-01)
Lin, Li-Chi
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Chen, Kuan-Yu
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Yang, Wen-Hau
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Huang, Ru-Yu
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Chen, Ke-Horng
it is crucial in near field communication (NFC) controllers for power source transferred from mutual induction of coils when the devices are battery-off. NFC devices can be operated at the condition of low battery or even battery-off due to the requirement of payment any time. Thus, the proposed wireless power transfer (WPT) power supply can have high efficiency due to the remove of reverse leakage current by the digital reverse current self-calibration (DRCS). NFC standards including A, B, and F can be continuously supplied by the WPT supply system. The WPT power supply with the DRCS technique was fabricated in 0.25 mu m CMOS process can rectify AC source from induction of magnetic field to unregulated DC voltage source and to supply power the NFC controller through low dropout regulator (LDR). Moreover, test chip achieves as high as 92% voltage conversion ratio and 89.4 % power conversion efficiency (PCE) due to reduction of unnecessary current loss.
A Fully Integrated Asymmetrical Shunt Switched-Capacitor DC-DC Converter With Fast Optimum Ratio Searching Scheme for Load Transient Enhancement
(2019-09-01)
Lin, Yen-Ting
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Lai, Yan-Jiun
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Chen, Hung-Wei
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Yang, Wen-Hau
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Ma, Yu-Sheng
This paper presents a modified negator-based switched-capacitor (NSC) dc-dc converter to achieve fine-grained voltage conversion ratios. Based on a concept of reconfiguring several 2: 1 switched-capacitor (SC) converters in series and parallel at the last stage, the proposed asymmetrical shunt SC (ASSC) converter provides more controllable variables of forward gain and feedback gain to decide different power path interconnections and increase the available conversion ratios, with a little sacrifice of its slow switching limit output impedance. The switching loss of the bottom-plate parasitic capacitance in the ASSC converter is less than the switching loss of the NSC topology because the two moderate voltages instead of the power rail are fed to the last stage 2: 1 SC unit and reduce the voltage swing. The bottom-plate swapping prototype further reduces the parasitic loss at high conversion ratios. To handle a large number of conversion ratios in closed-loop regulation, the ASSC converter uses the fast optimum ratio searching (FORS) technique, which evaluates the transient voltage drop to quickly search for target ratios and reduce the transient recovery time. A three-stage ASSC converter achieving 187 conversion ratios is fully integrated in the test chip, which is fabricated in 0.25-mu m CMOS process with an active area of 7.14 mm(2). Furthermore, 2389 conversion ratios can be derived in theory for a four-stage ASSC converter. The proposed reconfigurable SC converter provides an output voltage range of 0.4 to 2.8 V under no load conditions, and greater than 80% power efficiency at an output voltage level of 0.9 to 1.5 V over a load range of 3 to 9.5 mA. Due to the FORS technique, the measured transient recovery time is reduced from 7 to 1.5 mu s in case of load current step of 7 mA.
A High Efficiency and Fast Transient Digital Low-Dropout Assisted Switched-Capacitor Converter for EMI-Free Internet of Everything (IoE) Systems
(2017-01-01)
Chen, Shao-Qi
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Lin, Yen-Ting
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Ma, Yu-Sheng
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Yang, Wen-Hau
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Chen, Ke-Horng
State-of-the-art closed-loop switched-capacitor (SC) designs usually regulate the output voltage by pulse frequency modulation (PFM) with the disadvantage of large electromagnetic interference (EMI). It may cause the failure of the Internet of Everything (IoE) devices. This paper proposes the hybrid digital low drop-out (DLDO) SC converter with a constant switching pulse width modulation (PWM) control for low EMI. Besides, the analog-to-digital current conversion provided by the DLDO due to its fast transient response can predict the desired ratio for the SC and reduce the dip voltage at the same time. The handshaking technique achieves smooth transition in the hybrid architecture. Experimental results show peak efficiency of 85% (closed-loop) and 95% (open loop) since the power converter has fast transient response by the DLDO prediction and reduction of switching power loss. Accurate fine tune operation by the DLDO and smooth handshaking improve load regulation from 49mV to 3mV and undershoot from 263mV to 93mV with a reduced recovery time of 200ns.
A High-Efficiency Single-Inductor Multiple-Output Buck-Type LED Driver With Average Current Correction Technique
(2018-04-01)
Yang, Wen-Hau
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Yang, Hsiang-An
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Huang, Chao-Jen
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Chen, Ke-Horng
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Lin, Ying-Hsi
The state-of-the-art topology of a single-inductor multiple-output light emission diode (LED) driver employs time-multiplexing (TM) control multiple parallel LED strings. The TM control technology provides large output current but the inductor current is separated to several parts and unable to be used simultaneously. The limitation of TM control also results in low dimming frequency and low color resolution. Thus, a single-inductor multiple-floating-output (SIMFO) LED driver with the average current correction (ACC) technique is proposed to solve these problems, so the inductor current is simultaneously utilized by every LED in series, with enhancement of luminous efficiency. Furthermore, the proposed ACC technique adaptively adjusts the average current to eliminate the current cross-regulation effect occurring in different dimming patterns, so each different color LED has its own dimming ratio. The test chip is fabricated in a 0.5-mu m high voltage (HV) process with an active area of 15 mm(2), and experimental results show the proposed LED driver achieves 24-b color resolution with 12 W output power and maintains 96% high efficiency in the RGBW LED applications.
A Low Quiescent Current and Cross Regulation Single-Inductor Dual-Output Converter with Stacking MOSFET Driving Technique
(2017-01-01)
Ma, Yu-Sheng
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Yang, Wen-Hau
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Lin, Yen-Ting
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Chen, Hsin
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Lin, Li-Chi
the stacking MOSFET structure composed of low-voltage devices suffers from deteriorated transient response or large footprint area when capacitor-free or dominant pole compensation low dropout (LDO) regulator biases the driver. Due to self-stabilized feature, the proposed stacking MOSFET driving (SMD) technique effectively drives the power stage and greatly reduces noise interference from the noisy node to achieve low cross regulation (CR) in the single-inductor dual-output (SIDO) converter. Moreover, two inherent low dropout (LDO) regulators in the SMD technique completely regulate two outputs with low quiescent current at no load condition. Experimental results show the tested chip fabricated in 0.25 mu m process with low cross regulation of 0.015mV/mA and ultra-low quiescent current of 5 mu A at no load condition.
A Single-Inductor Dual-Output Converter With the Stacked MOSFET Driving Technique for Low Quiescent Current and Cross Regulation
(2019-03-01)
Chen, Hsin
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Huang, Chao-Jen
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Kuo, Chun-Chieh
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Lin, Li-Chi
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Ma, Yu-Sheng
Stacked MOSFET structures made of low-voltage devices suffer from degraded transient response or large footprint when a capacitorless or dominant-pole compensated low-dropout (LDO) regulator biases the driver. Due to the self-stabilizing nature, the proposed stacked MOSFET driver (SMD) technology effectively drives the power stage and greatly reduces the noise at the switching nodes for low cross regulation (CR) in a single-inductor dual-output (SIDO) converter. In addition, two inherent LDO regulators in SMD technology fully regulate the dual outputs with the advantage of low quiescent current at no-load conditions. The experimental results show that the test chip fabricated under the 0.25-mu m process has low CR of 0.015 mV/mA and ultralow quiescent current of 5 mu A under no-load conditions.
A Three-Level Single-Inductor Triple-Output Converter with an Adjustable Flying-Capacitor Technique for Low Output Ripple and Fast Transient Response
(2017-01-01)
Chu, Li-Cheng
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Yang, Wen-Hau
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Zhang, Xiao-Qing
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Lai, Yan-Jiun
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Chen, Ke-Horng
A True-Random-Number-Based Pseudohysteresis Controller for Buck DC-DC Converter in High-Security Internet-of-Everything Devices
(2020-03-01)
Yang, Wen-Hau
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Chiu, Shao-Wei
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Kuo, Chun-Chieh
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Lin, Yen-Ting
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Lai, Yan-Jiun
For high-security Internet-of-Everything (IoE) devices, a true random number (TRN)-based pseudohysteresis controller (PHC) is proposed to avoid both power side-channel attack (PSCA) and power injection attack (PIA) and reduce electromagnetic interference (EMI) without degrading performance of transient response and regulation. In addition, the TRN-based PHC uses an enhanced security randomizer to correctly generate a random number (RN) independent of the input power at the PSCA and PIA and converts the RN into a hysteresis window that constitutes the true random modulation switching frequency. Therefore, the TRN-based PHC ensures proper spread spectrum and low EMI. In addition, fast transient response is maintained due to inherent hysteresis control. Experimental results show that peak EMI noise is reduced from 89.72 to 54.32dBV and meets the specification of EN 55032 Class B even under the PIA interference up to 1 V. Furthermore, in case of 0.2A-to-0.8A load step, the method achieves a recovery time of 7.3 s and an output voltage drop of 53 mV at a switching frequency of approximately 1 MHz, and the peak efficiency is 92.4.
An Enhanced-Security Buck DC-DC Converter with True-Random-Number-Based Pseudo Hysteresis Controller for Internet-of-Everything (IoE) Devices
(2018-01-01)
Yang, Wen-Hau
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Chu, Li-Cheng
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Yang, Shang-Hsien
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Lai, Yan-Jiun
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Chen, Shao-Qi
An Enhanced-Security Buck DC-DC Converter with True-Random-Number-Based Pseudo Hysteresis Controller for Internet-of-Everything (IoE) Devices
(2018-01-01)
Yang, Wen-Hau
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Chu, Li-Cheng
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Yang, Shang-Hsien
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Lai, Yan-Jiun
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Chen, Shao-Qi
Digital Low-Dropout Regulator with Anti PVT-Variation Technique for Dynamic Voltage Scaling and Adaptive Voltage Scaling Multicore Processor
(2017-01-01)
Tsou, Wen-Jie
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Yang, Wen-Hau
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Lin, Jian-He
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Chen, Hsin
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Chen, Ke-Horng
Suppressing Output Overshoot Voltage Technique with 47.1mW/mu s Power-Recycling Rate and 93% Peak Efficiency DC-DC Converter for Multi-core Processors
(2015)
Chien, Meng-Wei
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Yang, Wen-Hau
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Chou, Ying-Wei
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Chen, Hsin-Chieh
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Chen, Wei-Chung
Conversion efficiency degrades in case of heavy-to-light loading change since state-of-art overshoot reduction techniques simply dissipate redundant energy at the output of buck DC-DC converter. Thus, the proposed dual-mode ripple-recovered compensator (D-RRC) and multi-phase suppressing output overshoot voltage (MP-SOOV) technique uses 33nH bondwire inductance to recycle energy and provides 47.1mW/mu s ultra-fast power-recycling rate to suppress overshoot voltage from 507mV to 95mV with 81.3% improvement when load changes from 1.7A to 0.3A. Experimental results show 93% high efficiency and high-speed operation with only tens of nano second on-time period.
Unsymmetrical Parallel Switched-Capacitor (UP-SC) Regulator with Fast Searching Optimum Ratio Technique
(2017-01-01)
Lin, Yen-Ting
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Yang, Wen-Hau
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Ma, Yu-Sheng
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Lai, Yan-Jiun
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Chen, Hung-Wei
Different from conventional multiphase switched-capacitor (SC) DC-DC converters, the proposed unsymmetrical parallel switched-capacitor (UP-SC) regulator provides more controllable input variables to increase available conversion ratios for improved load regulation. Even under higher conversion ratio numbers, the UP-SC regulator uses the fast searching optimum ratio (FSOR) technique to search the destined ratio rapidly and to reduce the transient recovery time. Experimental results show the test chip fabricated in 0.25 mu m CMOS process increases the ratio number to 187 and 2389 in 3-stage and 4-stage SC regulators, respectively. Transient recovery time reduces from 26 mu s to 1.5 mu s in case of 7mA load current step.