Browsing by Author "Yeh, PH"

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A novel SiGe raised source/drain polycrystalline silicon thin-film transistor with improved on-current and larger breakdown voltage
(2003-03-01)
Peng, DZ
;
Chang, TC
;
Liu, CF
;
Yeh, PH
;
Liu, PT
A novel poly-Si thin-film transistor with a self-aligned SiGe raised source/drain (SiGe-RSD TFT) has been proposed and fabricated. The SiGe-RSD regions were grown selectively by the ultra-high vacuum chemical vapor deposition (UHVCVD) process designed by us at 550degreesC. The resultant transistor structure features an ultra-thin active channel region (20 nm) and a self-aligned thick source/drain region (120 nm), and is ideally suited for optimum performance. Significant improvements in electrical characteristics, such as higher turn-on current, lower leakage current and higher drain breakdown voltage have been observed in the SiGe RSD TFT, compared to its conventional TFT counterpart. Moreover, the process is simple and no additional masks are necessary, which is consistent with conventional fabrication processes.
Fabrication of NiSi2 nanocrystals embedded in SiO2 with memory effect by oxidation of the amorphous Si/Ni/SiO2 structure
(2005-07-01)
Yeh, PH
;
Wu, HH
;
Yu, CH
;
Chen, LJ
;
Liu, PT
NiSi2 nanocrystals embedded in the SiO2 layer exhibiting a memory effect have been formed by dry oxidation of an amorphous Si/Ni/SiO2 structure at 900 degrees C. A pronounced capacitance-voltage hysteresis was observed with a memory window of I V under the 2 V programming voltage for the samples. For dry oxidation at 800 degrees C, no distinct memory effect was detected. The processing of the structure is compatible with the current manufacturing technology of the semiconductor industry. The structure represents a viable candidate for low-power nanoscaled nonvolatile memory devices. (c) 2005 American Vacuum Society.