Browsing by Author "Yu, HY"

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A prioritized Petri Net model and its application in distributed multimedia systems
(1998-04-01)
Guan, SU
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Yu, HY
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Yang, JS
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資訊工程學系
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Department of Computer Science
The achievement of media synchronization has been dealt with in the Object Composition Petri Net (OCPN) model and the extended OCPN (XOCPN) model. Yet these two models are not enough for synchronization of computers in a distributed environment. This paper proposes a new Petri Net model-Prioritized Petri Net (P-net). The modeling power and properties of P-nets are analyzed. We apply the P-net model to distributed multimedia synchronization, using our version of Distributed Object Composition Petri Net (DOCPN) model. Using the DOCPN model, we can coordinate operations among distributed computer sites. The scenario is like a conductor conducting an orchestra to perform a symphony.
Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode
(2004-10-01)
Zhu, SY
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Yu, HY
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Chen, JD
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Whang, SJ
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Chen, JH
Both P- and N-channel MOSFET's with Schottky barrier silicide source/drain (S/D), high-K gate dielectric and metal gate were successfully fabricated using a simplified low temperature process. The highest temperature after the high-K dielectric formation is 420degreesC. PMOSFETs with PtSi S/D show excellent electrical performance of an I-on/I-off similar to 10(7)-10(8) and a subthreshold slope of 66 mV/dec, similar to those formed by a normal process with an optimized sidewall spacer. NMOSFETs with DySi2-x S/D have similar to3 orders of magnitude larger I-off than that of PMOSFETs and show two slopes in the subthreshold region, resulting in the I-on/I-off similar to 10(5) at low drain voltage. It can be attributed to the relatively higher barrier height (Phi(n)) of DySi2-x/n-Si than that of PtSi/p-Si (Phi(p)) and the rougher DySi2-x film. Adding a thin intermediate Ge layer (similar to1nm) between Dy and Si can improve the film morphology significantly. As a result, the improved performance of N-MOSFET is observed. (C) 2004 Published by Elsevier Ltd.
Schottky-barrier S/D MOSFETs with high-K gate dielectrics and metal-gate electrode
(2004-05-01)
Zhu, SY
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Yu, HY
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Whang, SJ
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Chen, JH
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Shen, C
This letter presents a low-temperature process to fabricate Schottky-barrier silicide source/drain transistors (SSDTs) with high-kappa gate dielectric and metal gate. For p-channel SSDTs (P-SSDT) using PtSi source/drain (S/D), excellent electrical performance of I-on/I-off similar to 10(7) - 10(8) and subthreshold slope of 66 mV/dec have been achieved. For n-channel SSDTs (N-SSDTs) using DySi2-x S/D, I-on/I-off can reach similar to 10(5) at V-ds of 0.2 V with two subthreshold slopes of 80 and 340 mV/dec. The low-temperature process relaxes the thermal budget of high-kappa dielectric and metal-gate materials to be used in the future generation CMOS technology.