Browsing by Author "Zhu, C"

Now showing 1 - 6 of 6

3D GOI CMOSFETs with novel IrO2(Hf) dual gates and high-kappa dielectric on 1P6M-0.18 mu m-CMOS
(2004)
Yu, DS
;
Chin, A
;
Laio, CC
;
Lee, CF
;
Cheng, CF
For the first time, we demonstrate 3D integration of self-aligned IrO2(Hf)/LaAlO3/GOI CMOSFETs above 0.18 pm Si CMOSFETs. At EOT=1.4nm, the novel IrO2(Hf) dual gates (4.4 and 5.1 eV workfunction) on control 2D LaAlO3/Si devices have high electron and hole mobilities of 203 and 67 cm(2)/Vs. On the 3D structure the LaAlO3/GOI shows even higher 389 and 234 cm(2)/Vs mobilities, and process compatibility with current Si VLSI. The higher drive current, larger integration density, shorter interconnects distance, and simple process of 3D approach can help solve the AC power issue and 2D scaling limitation.
A tunable and program-erasable capacitor on Si with excellent tuning memory
(2004)
Lai, CH
;
Lee, CF
;
Chin, A
;
Zhu, C
;
Li, MF
A novel tunable and program-erasable high-kappa: AIN MIS capacitor is demonstrated for the first time with excellent tuning memory, which is useful to tune the impedance mismatching and resonance frequency without always connected voltage bias circuit. Large C-max /C-min tunability of 12 is obtained due to the high-kappa AIN dielectric with high 5 muF/mum(2) capacitance density. Good tuning memory is evidenced from the small V-th variation after program or erase at +4 V or -4 V for 10,000 s and the potential of years long extrapolated memory time.
High performance metal-gate/high-kappa, MOSFETs and GaAs compatible RF passive devices on Ge-on-Insulator tlechnology
(2004)
Chin, A
;
Kao, HL
;
Yu, DS
;
Liao, CC
;
Zhu, C
We propose and demonstrate a new VLSI structure using high performance metal-gate/high-kappa MOSFETs and high-Q RF passive devices on Ge-on- Insulator (GOI) platform. In additional to high RF performance passive devices on insulating Si formed by ion implantation. the metal-gate/(La)AiO(3)/GOI MOSFETs have 1.7-2.0X improved electron and hole mobility with the merits of minimizing interfacial reaction., high-kappa crystallization, Fermi-level pinning, and impurity diffusion due to low thermal budget of 500 degrees C RTA.
High work function IrxSi gates on HfAlON p-MOSFETs
(2006-02-01)
Wu, CH
;
Yu, DS
;
Chin, A
;
Wang, SJ
;
Li, MF
We have fabricated the fully silicided IrxSi-gated p-MOSFETs on HfAlON gate dielectric with 1.7-mn equivalent oxide thickness. After 950 degrees C rapid thermal annealing, the fully IrxSi/HfAlON device has high effective work function of 4.9 eV, high peak hole mobility of 80 cm(2)/V.s, and the advantage of being process compatible to the current VLSI fabrication line.
Lanthanide and Ir-based dual metal-gate/HfAlON CMOS with large work-function difference
(2005)
Yu, DS
;
Chin, A
;
Wu, CH
;
Li, MF
;
Zhu, C
Metallic diffusion through high-K HfO(2), caused by high temperature metal-nitride decomposition, was reduced by using robust HfAlON. Useful dual effective work-function (phi(m,eff)) of 4.25 and 5.15 eV are obtained in TaTb(0.2)N/HfAlON and Ir/HfAlON at 1.7nm EOT. Good dual phi(m,eff) of 4.15 and 4.9 eV are also obtained in Yb(x)Si/HfAlON and Ir(x)Si/HfAlON FUSI-gates by reduced metal diffusion at lower temperature.
Strain-induced very low noise RF MOSFETs on flexible plastic substrate
(2005)
Kao, HL
;
Chin, A
;
Hung, BF
;
Lai, JM
;
Lee, CF
Using microstrip line design to screen substrate resistance generated RF noise, very low 1.1 dB min. noise figure (NFmin) and high 12 dB associate gain are measured at 10 GHz of 0.18 mu m MOSFET on plastic without de-embedding. The die on plastic was thinned to 30 mu m that allows applying uniaxial strain to further lower the 10 GHz NFmin to only 0.92 dB and comparable well with the 0.13 mu m and 90nm nodes MOSFETs.