Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 陳添福 | en_US |
| dc.contributor.author | Chen Tien-Fu | en_US |
| dc.date.accessioned | 2014-12-13T10:44:46Z | - |
| dc.date.available | 2014-12-13T10:44:46Z | - |
| dc.date.issued | 2010 | en_US |
| dc.identifier.govdoc | NSC98-2221-E009-188-MY3 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/100126 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=2008826&docId=328601 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | 低電壓及抗變異設計之關鍵技術---子計畫一：抗變異可調適之處理器架構設計與其系統環境建置 | zh_TW |
| dc.title | An Adaptive Processor Architecture for Tolerating Variations and Its System Design Environment | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 國立交通大學資訊工程學系（所） | zh_TW |
| Appears in Collections: | Research Plans | |
