可超寬調壓之智慧視覺處理晶片系統平台---子計畫一：適用於智慧視覺晶片系統之可超寬調壓記憶體系統及虛擬平台設計

Abstract

低電壓的電路設計已是時勢所趨，又因著製程密度的精進，能夠提供低功率消耗的 IC設計技術，必然會在往後的科技產品設計中成為不可或缺的必備功能，然而低電壓 在logic cell或memory cell都產生極大的延遲差異問題。例如90nm的製程電晶體在頻 率上有將近30%的變化性，因此針對timing variation及on-chip reliability問題的解決更 是刻不容緩的任務。另外在嵌入式系統方面，處理器的功率消耗量更為消費者關注，在 電池技術還未一日千里的階段，如何在嵌入式系統中管理及節省電力越來越佔有重要的 地位。

本子計晝將研發於超低電壓環境中之記憶體階層相關技術，主要目標為開發設計(1) 建構UDVS SoC之ESL平台、（2)廣操作電壓的記憶體階層系統、與（3)系統層級超 低電壓記憶體開發平台建置。關鍵功率消耗控制，低成本之微處理器於低電壓之下將有 超低功率之優勢，但位於微處理器内部的快取記憶體無法容忍超低電壓的環境，故結合 一、二項以設計出可容忍超低電壓塊取記憶體，其稱為廣操作電壓的記憶體架構，預期 於低電壓環境下可達抗變異之效，且亦增進處理器效能。同時我們將建構超低電壓記憶 體系統開發與評估環境，加速系統開發流程，充分支援總計晝低電壓處理器系統之整體 系統開發。

Consistent with the trend of low-voltage circuit techniques and process improvement, critical methodologies or technologies for low-power will play an important role in future electronic products. However, scaling to low-voltage will cause non-linear latency delay increasing and significant reliability problems. For example, the frequency variation of transistor process achieves 30% in technology node 90nm, therefore the problems of timing variation and on-chip reliability are emergent to solve. Moreover, in the embedded system, the power consumption of microprocessor is more important because of limitation of battery capacity. But, more and more Multimedia, Bluetooth, and Wireless applications on mobile will keep the power consumption growing.

In the sub-project, we propose to construct a variation-tolerant low-power memory hierarchy and its relative techniques in low-voltage environment, and there are three main design/implementation targets. First, We build the ESL platform of whole UDVS SoC. Second, we focus on ultra-wide operating voltage scaling memory hierarchy system design, and then it will be based for following variation-tolerant researches. Finally, we plan to build power-level SOC simulation/evaluation platform for facilitating hardware/software co-design. Low-voltage and low-complexity processor can get very low power consumption. But the cache system will fail in ULV environment. So we propose the UDVS cache system which can tolerate the failure caused by ULV environment.